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https://github.com/c64scene-ar/llvm-6502.git
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R600: Add support for i8 and i16 local memory stores
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189223 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Tom Stellard
parent
7a0282daeb
commit
8e78012457
@ -495,9 +495,9 @@ SDValue AMDGPUTargetLowering::SplitVectorStore(SDValue Op,
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Store->getBasePtr(),
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DAG.getConstant(i * (MemEltVT.getSizeInBits() / 8),
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PtrVT));
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Chains.push_back(DAG.getStore(Store->getChain(), SL, Val, Ptr,
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Chains.push_back(DAG.getTruncStore(Store->getChain(), SL, Val, Ptr,
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MachinePointerInfo(Store->getMemOperand()->getValue()),
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Store->isVolatile(), Store->isNonTemporal(),
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MemEltVT, Store->isVolatile(), Store->isNonTemporal(),
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Store->getAlignment()));
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}
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return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, &Chains[0], NumElts);
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@ -73,6 +73,13 @@ def AMDGPUregister_store : SDNode<"AMDGPUISD::REGISTER_STORE",
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SDTypeProfile<0, 3, [SDTCisPtrTy<1>, SDTCisInt<2>]>,
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[SDNPHasChain, SDNPMayStore]>;
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// MSKOR instructions are atomic memory instructions used mainly for storing
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// 8-bit and 16-bit values. The definition is:
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//
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// MSKOR(dst, mask, src) MEM[dst] = ((MEM[dst] & ~mask) | src)
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//
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// src0: vec4(src, 0, 0, mask)
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// src1: dst - rat offset (aka pointer) in dwords
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def AMDGPUstore_mskor : SDNode<"AMDGPUISD::STORE_MSKOR",
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SDTypeProfile<0, 2, []>,
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[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
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@ -156,13 +156,23 @@ def truncstorei16_global : PatFrag<(ops node:$val, node:$ptr),
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return isGlobalStore(dyn_cast<StoreSDNode>(N));
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}]>;
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def local_load : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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return isLocalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def local_store : PatFrag<(ops node:$val, node:$ptr),
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(store node:$val, node:$ptr), [{
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return isLocalStore(dyn_cast<StoreSDNode>(N));
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return isLocalStore(dyn_cast<StoreSDNode>(N));
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}]>;
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def truncstorei8_local : PatFrag<(ops node:$val, node:$ptr),
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(truncstorei8 node:$val, node:$ptr), [{
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return isLocalStore(dyn_cast<StoreSDNode>(N));
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}]>;
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def truncstorei16_local : PatFrag<(ops node:$val, node:$ptr),
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(truncstorei16 node:$val, node:$ptr), [{
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return isLocalStore(dyn_cast<StoreSDNode>(N));
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}]>;
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def local_load : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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return isLocalLoad(dyn_cast<LoadSDNode>(N));
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}]>;
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def mskor_global : PatFrag<(ops node:$val, node:$ptr),
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@ -45,7 +45,8 @@ namespace R600_InstFlag {
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ALU_INST = (1 << 14),
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LDS_1A = (1 << 15),
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LDS_1A1D = (1 << 16),
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IS_EXPORT = (1 << 17)
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IS_EXPORT = (1 << 17),
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LDS_1A2D = (1 << 18)
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};
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}
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@ -30,6 +30,7 @@ class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
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bit TEXInst = 0;
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bit ALUInst = 0;
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bit IsExport = 0;
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bit LDS_1A2D = 0;
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let Namespace = "AMDGPU";
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let OutOperandList = outs;
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@ -55,6 +56,7 @@ class InstR600 <dag outs, dag ins, string asm, list<dag> pattern,
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let TSFlags{15} = LDS_1A;
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let TSFlags{16} = LDS_1A1D;
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let TSFlags{17} = IsExport;
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let TSFlags{18} = LDS_1A2D;
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}
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//===----------------------------------------------------------------------===//
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@ -149,7 +149,8 @@ bool R600InstrInfo::isLDSInstr(unsigned Opcode) const {
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unsigned TargetFlags = get(Opcode).TSFlags;
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return ((TargetFlags & R600_InstFlag::LDS_1A) |
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(TargetFlags & R600_InstFlag::LDS_1A1D));
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(TargetFlags & R600_InstFlag::LDS_1A1D) |
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(TargetFlags & R600_InstFlag::LDS_1A2D));
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}
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bool R600InstrInfo::isTransOnly(unsigned Opcode) const {
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@ -1657,13 +1657,31 @@ class R600_LDS_1A1D <bits<6> lds_op, string name, list<dag> pattern> :
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let LDS_1A1D = 1;
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}
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def LDS_READ_RET : R600_LDS_1A <0x32, "LDS_READ_RET",
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[(set (i32 R600_Reg32:$dst), (local_load R600_Reg32:$src0))]
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>;
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class R600_LDS_1A2D <bits<6> lds_op, string name, list<dag> pattern> :
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R600_LDS <
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lds_op,
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(outs),
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(ins R600_Reg32:$src0, REL:$src0_rel, SEL:$src0_sel,
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R600_Reg32:$src1, REL:$src1_rel, SEL:$src1_sel,
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R600_Reg32:$src2, REL:$src2_rel, SEL:$src2_sel,
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LAST:$last, R600_Pred:$pred_sel, BANK_SWIZZLE:$bank_swizzle),
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" "#name# "$last $src0$src0_rel, $src1$src1_rel, $src2$src2_rel, $pred_sel",
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pattern> {
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let LDS_1A2D = 1;
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}
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def LDS_WRITE : R600_LDS_1A1D <0xD, "LDS_WRITE",
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[(local_store (i32 R600_Reg32:$src1), R600_Reg32:$src0)]
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>;
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def LDS_BYTE_WRITE : R600_LDS_1A1D<0x12, "LDS_BYTE_WRITE",
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[(truncstorei8_local i32:$src1, i32:$src0)]
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>;
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def LDS_SHORT_WRITE : R600_LDS_1A1D<0x13, "LDS_SHORT_WRITE",
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[(truncstorei16_local i32:$src1, i32:$src0)]
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>;
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def LDS_READ_RET : R600_LDS_1A <0x32, "LDS_READ_RET",
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[(set (i32 R600_Reg32:$dst), (local_load R600_Reg32:$src0))]
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>;
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// TRUNC is used for the FLT_TO_INT instructions to work around a
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// perceived problem where the rounding modes are applied differently
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@ -392,6 +392,8 @@ defm V_CMPX_CLASS_F64 : VOPC_64 <0x000000b8, "V_CMPX_CLASS_F64">;
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} // End isCompare = 1
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def DS_WRITE_B32 : DS_Store_Helper <0x0000000d, "DS_WRITE_B32", VReg_32>;
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def DS_WRITE_B8 : DS_Store_Helper <0x00000001e, "DS_WRITE_B8", VReg_32>;
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def DS_WRITE_B16 : DS_Store_Helper <0x00000001f, "DS_WRITE_B16", VReg_32>;
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def DS_READ_B32 : DS_Load_Helper <0x00000036, "DS_READ_B32", VReg_32>;
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//def BUFFER_LOAD_FORMAT_X : MUBUF_ <0x00000000, "BUFFER_LOAD_FORMAT_X", []>;
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@ -1750,11 +1752,15 @@ def : Pat <
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(i32 (DS_READ_B32 0, $src0, $src0, $src0, 0, 0))
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>;
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def : Pat <
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(local_store i32:$src1, i32:$src0),
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(DS_WRITE_B32 0, $src0, $src1, $src1, 0, 0)
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class DSWritePat <DS inst, ValueType vt, PatFrag frag> : Pat <
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(frag i32:$src1, i32:$src0),
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(inst 0, $src0, $src1, $src1, 0, 0)
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>;
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def : DSWritePat <DS_WRITE_B8, i32, truncstorei8_local>;
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def : DSWritePat <DS_WRITE_B16, i32, truncstorei16_local>;
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def : DSWritePat <DS_WRITE_B32, i32, local_store>;
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/********** ================== **********/
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/********** SMRD Patterns **********/
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/********** ================== **********/
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@ -172,6 +172,24 @@ entry:
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; Local Address Space
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;===------------------------------------------------------------------------===;
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; EG-CHECK: @store_local_i8
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; EG-CHECK: LDS_BYTE_WRITE
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; SI-CHECK: @store_local_i8
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; SI-CHECK: DS_WRITE_B8
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define void @store_local_i8(i8 addrspace(3)* %out, i8 %in) {
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store i8 %in, i8 addrspace(3)* %out
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ret void
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}
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; EG-CHECK: @store_local_i16
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; EG-CHECK: LDS_SHORT_WRITE
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; SI-CHECK: @store_local_i16
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; SI-CHECK: DS_WRITE_B16
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define void @store_local_i16(i16 addrspace(3)* %out, i16 %in) {
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store i16 %in, i16 addrspace(3)* %out
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ret void
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}
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; EG-CHECK: @store_local_v2i16
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; EG-CHECK: LDS_WRITE
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; CM-CHECK: @store_local_v2i16
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