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Emit the warning about the register list not being in ascending order only once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118653 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -512,24 +512,27 @@ ARMOperand *ARMAsmParser::ParseRegisterList() {
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SmallVectorImpl<std::pair<unsigned, SMLoc> >::const_iterator
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RI = Registers.begin(), RE = Registers.end();
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unsigned HighRegNum = RI->first;
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DenseMap<unsigned, bool> RegMap;
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RegMap[RI->first] = true;
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unsigned HighRegNum = RI->first;
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bool EmittedWarning = false;
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for (++RI; RI != RE; ++RI) {
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const std::pair<unsigned, SMLoc> &RegInfo = *RI;
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unsigned Reg = RegInfo.first;
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if (RegMap[RegInfo.first]) {
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if (RegMap[Reg]) {
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Error(RegInfo.second, "register duplicated in register list");
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return 0;
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}
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if (RegInfo.first < HighRegNum)
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if (!EmittedWarning && Reg < HighRegNum)
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Warning(RegInfo.second,
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"register not in ascending order in register list");
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RegMap[RegInfo.first] = true;
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HighRegNum = std::max(RegInfo.first, HighRegNum);
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RegMap[Reg] = true;
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HighRegNum = std::max(Reg, HighRegNum);
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}
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return ARMOperand::CreateRegList(Registers, S, E);
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