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Treat mid-block labels the same as terminators when building the

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MachineInstr scheduling DAG, meaning they implicitly depend on all
preceding defs. This fixes Benchmarks/Shootout-C++/except and
Regression/C++/EH/simple_rethrow in
  -relocation-model=pic -disable-post-RA-scheduler=false
mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59747 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-11-20 19:58:35 +00:00
parent 5ce0973f7f
commit 8eaf41de8a
1 changed files with 1 additions and 1 deletions
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2
lib/CodeGen/ScheduleDAGInstrs.cpp
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@@ -97,7 +97,7 @@ void ScheduleDAGInstrs::BuildSchedUnits() {
} }
if (Terminator && SU->Succs.empty()) if (Terminator && SU->Succs.empty())
Terminator->addPred(SU, /*isCtrl=*/false, /*isSpecial=*/false); Terminator->addPred(SU, /*isCtrl=*/false, /*isSpecial=*/false);
if (MI->getDesc().isTerminator()) if (MI->getDesc().isTerminator() || MI->isLabel())
Terminator = SU; Terminator = SU;
} }
} }