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Teach DAGCombine to convert (sext x) to (zext x) when the

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sign-bit of x is known to be zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@50357 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2008-04-28 16:58:24 +00:00
parent beb4d8293d
commit 8f0ad582e8
1 changed files with 4 additions and 0 deletions
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4
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -2887,6 +2887,10 @@ SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
if (SCC.Val) return SCC; if (SCC.Val) return SCC;
} }
// fold (sext x) -> (zext x) if the sign bit is known zero.
if (DAG.SignBitIsZero(N0))
return DAG.getNode(ISD::ZERO_EXTEND, VT, N0);
return SDOperand(); return SDOperand();
} }