From 8f0d99e463a2dcb5a40d14f0481a0e322bcf79e4 Mon Sep 17 00:00:00 2001
From: Evan Cheng <evan.cheng@apple.com>
Date: Mon, 9 Feb 2009 08:45:39 +0000
Subject: [PATCH] Re-enable machine sinking pass now that the coalescer bugs
 and the AnalyzeBrnach bug are fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64126 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/CodeGen/LLVMTargetMachine.cpp           | 10 ++--------
 test/CodeGen/ARM/lsr-code-insertion.ll      |  2 +-
 test/CodeGen/X86/2006-05-11-InstrSched.ll   |  2 +-
 test/CodeGen/X86/2009-02-07-CoalescerBug.ll |  2 +-
 4 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 7def8fa61d2..f29944c7c90 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -38,11 +38,6 @@ static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
 static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden,
     cl::desc("Dump garbage collector data"));
 
-// Hidden options to help debugging
-static cl::opt<bool>
-EnableSinking("enable-sinking", cl::init(false), cl::Hidden,
-              cl::desc("Perform sinking on machine code"));
-
 // When this works it will be on by default.
 static cl::opt<bool>
 DisablePostRAScheduler("disable-post-RA-scheduler",
@@ -183,11 +178,10 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) {
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
 
-  if (!Fast)
+  if (!Fast) {
     PM.add(createMachineLICMPass());
-
-  if (EnableSinking)
     PM.add(createMachineSinkingPass());
+  }
 
   // Run pre-ra passes.
   if (addPreRegAlloc(PM, Fast) && PrintMachineCode)
diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll
index 3881e91453b..0a9227982d4 100644
--- a/test/CodeGen/ARM/lsr-code-insertion.ll
+++ b/test/CodeGen/ARM/lsr-code-insertion.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -stats |& grep {39.*Number of machine instrs printed}
+; RUN: llvm-as < %s | llc -stats |& grep {40.*Number of machine instrs printed}
 ; RUN: llvm-as < %s | llc -stats |& grep {.*Number of re-materialization}
 ; This test really wants to check that the resultant "cond_true" block only 
 ; has a single store in it, and that cond_true55 only has code to materialize 
diff --git a/test/CodeGen/X86/2006-05-11-InstrSched.ll b/test/CodeGen/X86/2006-05-11-InstrSched.ll
index 9d1d324fcec..774e7243fd3 100644
--- a/test/CodeGen/X86/2006-05-11-InstrSched.ll
+++ b/test/CodeGen/X86/2006-05-11-InstrSched.ll
@@ -1,5 +1,5 @@
 ; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -stats -realign-stack=0 |&\
-; RUN:     grep {asm-printer} | grep 32
+; RUN:     grep {asm-printer} | grep 31
 
 target datalayout = "e-p:32:32"
 define void @foo(i32* %mc, i32* %bp, i32* %ms, i32* %xmb, i32* %mpp, i32* %tpmm, i32* %ip, i32* %tpim, i32* %dpp, i32* %tpdm, i32* %bpi, i32 %M) nounwind {
diff --git a/test/CodeGen/X86/2009-02-07-CoalescerBug.ll b/test/CodeGen/X86/2009-02-07-CoalescerBug.ll
index 65b771ef3cf..784c97a2261 100644
--- a/test/CodeGen/X86/2009-02-07-CoalescerBug.ll
+++ b/test/CodeGen/X86/2009-02-07-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 -enable-sinking -relocation-model=pic -stats |& grep {Number of valno def marked dead} | grep 1
+; RUN: llvm-as < %s | llc -march=x86 -relocation-model=pic -stats |& grep {Number of valno def marked dead} | grep 1
 ; rdar://6566708
 
 target triple = "i386-apple-darwin9.6"