ARM can only use narrow encoding for low regs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153765 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2012-03-30 18:39:43 +00:00
parent ecf2d9fc0d
commit 8f1148bd07

View File

@ -6857,6 +6857,7 @@ processInstruction(MCInst &Inst,
// instead of T3. For compatibility with the system 'as'. Make sure the
// wide encoding wasn't explicit.
if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() ||
!isARMLowRegister(Inst.getOperand(0).getReg()) ||
(unsigned)Inst.getOperand(2).getImm() > 255 ||
((!inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) ||
(inITBlock() && Inst.getOperand(5).getReg() != 0)) ||