6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-19 04:32:19 +00:00
Code Issues Projects Releases Wiki Activity

[mips] Fix MipsSEInstrInfo::copyPhysReg, loadRegFromStack and storeRegToStack

Browse Source 
to handle accumulator registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178392 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2013-03-30 01:08:05 +00:00
parent d6a77822a9
commit 8f4d3800a7
1 changed files with 18 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
lib/Target/Mips/MipsSEInstrInfo.cpp
View File

@ -136,6 +136,12 @@ void MipsSEInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
else if (Mips::FGR64RegClass.contains(DestReg))
Opc = Mips::DMTC1;
}
else if (Mips::ACRegsRegClass.contains(DestReg, SrcReg))
Opc = Mips::COPY_AC64;
else if (Mips::ACRegsDSPRegClass.contains(DestReg, SrcReg))
Opc = Mips::COPY_AC_DSP;
else if (Mips::ACRegs128RegClass.contains(DestReg, SrcReg))
Opc = Mips::COPY_AC128;
assert(Opc && "Cannot copy registers");
@ -166,6 +172,12 @@ storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Opc = IsN64 ? Mips::SW_P8 : Mips::SW;
else if (Mips::CPU64RegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::SD_P8 : Mips::SD;
else if (Mips::ACRegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::STORE_AC64_P8 : Mips::STORE_AC64;
else if (Mips::ACRegsDSPRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::STORE_AC_DSP_P8 : Mips::STORE_AC_DSP;
else if (Mips::ACRegs128RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::STORE_AC128_P8 : Mips::STORE_AC128;
else if (Mips::FGR32RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::SWC1_P8 : Mips::SWC1;
else if (Mips::AFGR64RegClass.hasSubClassEq(RC))
@ -191,6 +203,12 @@ loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Opc = IsN64 ? Mips::LW_P8 : Mips::LW;
else if (Mips::CPU64RegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LD_P8 : Mips::LD;
else if (Mips::ACRegsRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LOAD_AC64_P8 : Mips::LOAD_AC64;
else if (Mips::ACRegsDSPRegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LOAD_AC_DSP_P8 : Mips::LOAD_AC_DSP;
else if (Mips::ACRegs128RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LOAD_AC128_P8 : Mips::LOAD_AC128;
else if (Mips::FGR32RegClass.hasSubClassEq(RC))
Opc = IsN64 ? Mips::LWC1_P8 : Mips::LWC1;
else if (Mips::AFGR64RegClass.hasSubClassEq(RC))