mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-18 12:29:21 +00:00
Add support for the new va_arg instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6029 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
97b315a585
commit
8f77daef04
@ -221,6 +221,7 @@ call { RET_TOK(OtherOpVal, Call, CALL); }
|
|||||||
cast { RET_TOK(OtherOpVal, Cast, CAST); }
|
cast { RET_TOK(OtherOpVal, Cast, CAST); }
|
||||||
shl { RET_TOK(OtherOpVal, Shl, SHL); }
|
shl { RET_TOK(OtherOpVal, Shl, SHL); }
|
||||||
shr { RET_TOK(OtherOpVal, Shr, SHR); }
|
shr { RET_TOK(OtherOpVal, Shr, SHR); }
|
||||||
|
va_arg { RET_TOK(OtherOpVal, VarArg, VA_ARG); }
|
||||||
|
|
||||||
ret { RET_TOK(TermOpVal, Ret, RET); }
|
ret { RET_TOK(TermOpVal, Ret, RET); }
|
||||||
br { RET_TOK(TermOpVal, Br, BR); }
|
br { RET_TOK(TermOpVal, Br, BR); }
|
||||||
|
@ -720,7 +720,7 @@ Module *RunVMAsmParser(const std::string &Filename, FILE *F) {
|
|||||||
|
|
||||||
// Other Operators
|
// Other Operators
|
||||||
%type <OtherOpVal> ShiftOps
|
%type <OtherOpVal> ShiftOps
|
||||||
%token <OtherOpVal> PHI CALL INVOKE CAST SHL SHR
|
%token <OtherOpVal> PHI CALL INVOKE CAST SHL SHR VA_ARG
|
||||||
|
|
||||||
%start Module
|
%start Module
|
||||||
%%
|
%%
|
||||||
@ -1614,6 +1614,10 @@ InstVal : ArithmeticOps Types ValueRef ',' ValueRef {
|
|||||||
$$ = new CastInst($2, *$4);
|
$$ = new CastInst($2, *$4);
|
||||||
delete $4;
|
delete $4;
|
||||||
}
|
}
|
||||||
|
| VA_ARG ResolvedVal ',' Types {
|
||||||
|
$$ = new VarArgInst($2, *$4);
|
||||||
|
delete $4;
|
||||||
|
}
|
||||||
| PHI PHIList {
|
| PHI PHIList {
|
||||||
const Type *Ty = $2->front().first->getType();
|
const Type *Ty = $2->front().first->getType();
|
||||||
$$ = new PHINode(Ty);
|
$$ = new PHINode(Ty);
|
||||||
|
@ -130,11 +130,15 @@ bool BytecodeParser::ParseInstruction(const uchar *&Buf, const uchar *EndBuf,
|
|||||||
|
|
||||||
Value *V;
|
Value *V;
|
||||||
switch (Raw.Opcode) {
|
switch (Raw.Opcode) {
|
||||||
|
case Instruction::VarArg:
|
||||||
case Instruction::Cast: {
|
case Instruction::Cast: {
|
||||||
V = getValue(Raw.Ty, Raw.Arg1);
|
V = getValue(Raw.Ty, Raw.Arg1);
|
||||||
const Type *Ty = getType(Raw.Arg2);
|
const Type *Ty = getType(Raw.Arg2);
|
||||||
if (V == 0 || Ty == 0) { std::cerr << "Invalid cast!\n"; return true; }
|
if (V == 0 || Ty == 0) { std::cerr << "Invalid cast!\n"; return true; }
|
||||||
Res = new CastInst(V, Ty);
|
if (Raw.Opcode == Instruction::Cast)
|
||||||
|
Res = new CastInst(V, Ty);
|
||||||
|
else
|
||||||
|
Res = new VarArgInst(V, Ty);
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
case Instruction::PHINode: {
|
case Instruction::PHINode: {
|
||||||
|
@ -35,7 +35,7 @@ static void outputInstructionFormat0(const Instruction *I,
|
|||||||
output_vbr(Type, Out); // Result type
|
output_vbr(Type, Out); // Result type
|
||||||
|
|
||||||
unsigned NumArgs = I->getNumOperands();
|
unsigned NumArgs = I->getNumOperands();
|
||||||
output_vbr(NumArgs + isa<CastInst>(I), Out);
|
output_vbr(NumArgs + (isa<CastInst>(I) || isa<VarArgInst>(I)), Out);
|
||||||
|
|
||||||
for (unsigned i = 0; i < NumArgs; ++i) {
|
for (unsigned i = 0; i < NumArgs; ++i) {
|
||||||
int Slot = Table.getValSlot(I->getOperand(i));
|
int Slot = Table.getValSlot(I->getOperand(i));
|
||||||
@ -43,9 +43,9 @@ static void outputInstructionFormat0(const Instruction *I,
|
|||||||
output_vbr((unsigned)Slot, Out);
|
output_vbr((unsigned)Slot, Out);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (isa<CastInst>(I)) {
|
if (isa<CastInst>(I) || isa<VarArgInst>(I)) {
|
||||||
int Slot = Table.getValSlot(I->getType());
|
int Slot = Table.getValSlot(I->getType());
|
||||||
assert(Slot != -1 && "Cast return type unknown?");
|
assert(Slot != -1 && "Cast/VarArg return type unknown?");
|
||||||
output_vbr((unsigned)Slot, Out);
|
output_vbr((unsigned)Slot, Out);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -218,7 +218,7 @@ void BytecodeWriter::processInstruction(const Instruction &I) {
|
|||||||
if (Slot > MaxOpSlot) MaxOpSlot = Slot;
|
if (Slot > MaxOpSlot) MaxOpSlot = Slot;
|
||||||
|
|
||||||
// Handle the special case for cast...
|
// Handle the special case for cast...
|
||||||
if (isa<CastInst>(I)) {
|
if (isa<CastInst>(I) || isa<VarArgInst>(I)) {
|
||||||
// Cast has to encode the destination type as the second argument in the
|
// Cast has to encode the destination type as the second argument in the
|
||||||
// packet, or else we won't know what type to cast to!
|
// packet, or else we won't know what type to cast to!
|
||||||
Slots[1] = Table.getValSlot(I.getType());
|
Slots[1] = Table.getValSlot(I.getType());
|
||||||
|
@ -3,8 +3,7 @@
|
|||||||
// This library implements the functionality defined in llvm/Assembly/Writer.h
|
// This library implements the functionality defined in llvm/Assembly/Writer.h
|
||||||
//
|
//
|
||||||
// Note that these routines must be extremely tolerant of various errors in the
|
// Note that these routines must be extremely tolerant of various errors in the
|
||||||
// LLVM code, because of of the primary uses of it is for debugging
|
// LLVM code, because it can be used for debugging transformations.
|
||||||
// transformations.
|
|
||||||
//
|
//
|
||||||
//===----------------------------------------------------------------------===//
|
//===----------------------------------------------------------------------===//
|
||||||
|
|
||||||
@ -814,9 +813,13 @@ void AssemblyWriter::printInstruction(const Instruction &I) {
|
|||||||
writeOperand(AI->getArraySize(), true);
|
writeOperand(AI->getArraySize(), true);
|
||||||
}
|
}
|
||||||
} else if (isa<CastInst>(I)) {
|
} else if (isa<CastInst>(I)) {
|
||||||
if (Operand) writeOperand(Operand, true);
|
writeOperand(Operand, true);
|
||||||
Out << " to ";
|
Out << " to ";
|
||||||
printType(I.getType());
|
printType(I.getType());
|
||||||
|
} else if (isa<VarArgInst>(I)) {
|
||||||
|
writeOperand(Operand, true);
|
||||||
|
Out << ", ";
|
||||||
|
printType(I.getType());
|
||||||
} else if (Operand) { // Print the normal way...
|
} else if (Operand) { // Print the normal way...
|
||||||
|
|
||||||
// PrintAllTypes - Instructions who have operands of all the same type
|
// PrintAllTypes - Instructions who have operands of all the same type
|
||||||
|
@ -91,7 +91,8 @@ const char *Instruction::getOpcodeName(unsigned OpCode) {
|
|||||||
case Call: return "call";
|
case Call: return "call";
|
||||||
case Shl: return "shl";
|
case Shl: return "shl";
|
||||||
case Shr: return "shr";
|
case Shr: return "shr";
|
||||||
|
case VarArg: return "va_arg";
|
||||||
|
|
||||||
default: return "<Invalid operator> ";
|
default: return "<Invalid operator> ";
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -130,6 +130,7 @@ namespace { // Anonymous namespace for class
|
|||||||
void visitPHINode(PHINode &PN);
|
void visitPHINode(PHINode &PN);
|
||||||
void visitBinaryOperator(BinaryOperator &B);
|
void visitBinaryOperator(BinaryOperator &B);
|
||||||
void visitShiftInst(ShiftInst &SI);
|
void visitShiftInst(ShiftInst &SI);
|
||||||
|
void visitVarArgInst(VarArgInst &VAI);
|
||||||
void visitCallInst(CallInst &CI);
|
void visitCallInst(CallInst &CI);
|
||||||
void visitGetElementPtrInst(GetElementPtrInst &GEP);
|
void visitGetElementPtrInst(GetElementPtrInst &GEP);
|
||||||
void visitLoadInst(LoadInst &LI);
|
void visitLoadInst(LoadInst &LI);
|
||||||
@ -402,7 +403,12 @@ void Verifier::visitShiftInst(ShiftInst &SI) {
|
|||||||
visitInstruction(SI);
|
visitInstruction(SI);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void Verifier::visitVarArgInst(VarArgInst &VAI) {
|
||||||
|
Assert1(VAI.getParent()->getParent()->getFunctionType()->isVarArg(),
|
||||||
|
"va_arg instruction may only occur in function with variable args!",
|
||||||
|
&VAI);
|
||||||
|
visitInstruction(VAI);
|
||||||
|
}
|
||||||
|
|
||||||
void Verifier::visitGetElementPtrInst(GetElementPtrInst &GEP) {
|
void Verifier::visitGetElementPtrInst(GetElementPtrInst &GEP) {
|
||||||
const Type *ElTy =
|
const Type *ElTy =
|
||||||
|
Loading…
Reference in New Issue
Block a user