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InstCombine: fold (A << C) == (B << C) --> ((A^B) & (~0U >> C)) == 0
Anding and comparing with zero can be done in a single instruction on most archs so this is a bit cheaper. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233291 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1844,44 +1844,6 @@ we remove checking in code like
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//===---------------------------------------------------------------------===//
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This code (from Benchmarks/Dhrystone/dry.c):
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define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
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entry:
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%sext = shl i32 %0, 24
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%conv = ashr i32 %sext, 24
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%sext6 = shl i32 %1, 24
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%conv4 = ashr i32 %sext6, 24
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%cmp = icmp eq i32 %conv, %conv4
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%. = select i1 %cmp, i32 10000, i32 0
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ret i32 %.
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}
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Should be simplified into something like:
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define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
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entry:
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%sext = shl i32 %0, 24
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%conv = and i32 %sext, 0xFF000000
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%sext6 = shl i32 %1, 24
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%conv4 = and i32 %sext6, 0xFF000000
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%cmp = icmp eq i32 %conv, %conv4
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%. = select i1 %cmp, i32 10000, i32 0
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ret i32 %.
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}
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and then to:
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define i32 @Func1(i32, i32) nounwind readnone optsize ssp {
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entry:
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%conv = and i32 %0, 0xFF
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%conv4 = and i32 %1, 0xFF
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%cmp = icmp eq i32 %conv, %conv4
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%. = select i1 %cmp, i32 10000, i32 0
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ret i32 %.
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}
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//===---------------------------------------------------------------------===//
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clang -O3 currently compiles this code
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int g(unsigned int a) {
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@ -3553,6 +3553,21 @@ Instruction *InstCombiner::visitICmpInst(ICmpInst &I) {
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}
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}
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// (A << C) == (B << C) --> ((A^B) & (~0U >> C)) == 0
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if (match(Op0, m_OneUse(m_Shl(m_Value(A), m_ConstantInt(Cst1)))) &&
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match(Op1, m_OneUse(m_Shl(m_Value(B), m_Specific(Cst1))))) {
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unsigned TypeBits = Cst1->getBitWidth();
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unsigned ShAmt = (unsigned)Cst1->getLimitedValue(TypeBits);
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if (ShAmt < TypeBits && ShAmt != 0) {
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Value *Xor = Builder->CreateXor(A, B, I.getName() + ".unshifted");
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APInt AndVal = APInt::getLowBitsSet(TypeBits, TypeBits - ShAmt);
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Value *And = Builder->CreateAnd(Xor, Builder->getInt(AndVal),
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I.getName() + ".mask");
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return new ICmpInst(I.getPredicate(), And,
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Constant::getNullValue(Cst1->getType()));
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}
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}
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// Transform "icmp eq (trunc (lshr(X, cst1)), cst" to
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// "icmp (and X, mask), cst"
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uint64_t ShAmt = 0;
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@ -1573,3 +1573,33 @@ define i32 @f5(i8 %a, i8 %b) {
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%sub7.sub = select i1 %cmp4, i32 %sub7, i32 %sub
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ret i32 %sub7.sub
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}
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; CHECK-LABEL: @f6
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; CHECK: %cmp.unshifted = xor i32 %a, %b
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; CHECK-NEXT: %cmp.mask = and i32 %cmp.unshifted, 255
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; CHECK-NEXT: %cmp = icmp eq i32 %cmp.mask, 0
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; CHECK-NEXT: %s = select i1 %cmp, i32 10000, i32 0
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; CHECK-NEXT: ret i32 %s
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define i32 @f6(i32 %a, i32 %b) {
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%sext = shl i32 %a, 24
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%conv = ashr i32 %sext, 24
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%sext6 = shl i32 %b, 24
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%conv4 = ashr i32 %sext6, 24
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%cmp = icmp eq i32 %conv, %conv4
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%s = select i1 %cmp, i32 10000, i32 0
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ret i32 %s
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}
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; CHECK-LABEL: @f7
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; CHECK: %cmp.unshifted = xor i32 %a, %b
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; CHECK-NEXT: %cmp.mask = and i32 %cmp.unshifted, 511
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; CHECK-NEXT: %cmp = icmp ne i32 %cmp.mask, 0
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; CHECK-NEXT: %s = select i1 %cmp, i32 10000, i32 0
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; CHECK-NEXT: ret i32 %s
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define i32 @f7(i32 %a, i32 %b) {
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%sext = shl i32 %a, 23
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%sext6 = shl i32 %b, 23
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%cmp = icmp ne i32 %sext, %sext6
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%s = select i1 %cmp, i32 10000, i32 0
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ret i32 %s
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}
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