mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Now that all ARM subtargets use frame index scavenging, the Thumb1 requires*
functions are not needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84587 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
0222a8cfb8
commit
8fa4efeabf
@ -77,18 +77,6 @@ Thumb1RegisterInfo::getPhysicalRegisterRegClass(unsigned Reg, EVT VT) const {
|
||||
return TargetRegisterInfo::getPhysicalRegisterRegClass(Reg, VT);
|
||||
}
|
||||
|
||||
bool
|
||||
Thumb1RegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
|
||||
return true;
|
||||
}
|
||||
|
||||
bool
|
||||
Thumb1RegisterInfo::requiresFrameIndexScavenging(const MachineFunction &MF)
|
||||
const {
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
bool Thumb1RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
|
||||
const MachineFrameInfo *FFI = MF.getFrameInfo();
|
||||
unsigned CFSize = FFI->getMaxCallFrameSize();
|
||||
|
@ -40,9 +40,6 @@ public:
|
||||
const TargetRegisterClass *
|
||||
getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
|
||||
|
||||
bool requiresRegisterScavenging(const MachineFunction &MF) const;
|
||||
bool requiresFrameIndexScavenging(const MachineFunction &MF) const;
|
||||
|
||||
bool hasReservedCallFrame(MachineFunction &MF) const;
|
||||
|
||||
void eliminateCallFramePseudoInstr(MachineFunction &MF,
|
||||
|
Loading…
Reference in New Issue
Block a user