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Fix disassembling of VCVTSD2SI

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2011-08-26 04:49:29 +00:00
parent 5434c1e73b
commit 8fd13b6de5
2 changed files with 13 additions and 10 deletions
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14
lib/Target/X86/X86InstrSSE.td
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@ -715,14 +715,6 @@ multiclass sse12_cvt_s<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
[(set DstRC:$dst, (OpNode (ld_frag addr:$src)))]>;
}
multiclass sse12_cvt_s_np<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
X86MemOperand x86memop, string asm> {
def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins SrcRC:$src), asm,
[]>;
def rm : SI<opc, MRMSrcMem, (outs DstRC:$dst), (ins x86memop:$src), asm,
[]>;
}
multiclass sse12_cvt_p<bits<8> opc, RegisterClass SrcRC, RegisterClass DstRC,
SDNode OpNode, X86MemOperand x86memop, PatFrag ld_frag,
string asm, Domain d> {
@ -844,10 +836,12 @@ defm Int_VCVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64,
// Get rid of this hack or rename the intrinsics, there are several
// intructions that only match with the intrinsic form, why create duplicates
// to let them be recognized by the assembler?
defm VCVTSD2SI_alt : sse12_cvt_s_np<0x2D, FR64, GR32, f64mem,
let Pattern = []<dag> in {
defm VCVTSD2SI : sse12_cvt_s<0x2D, FR64, GR32, undef, f64mem, load,
"cvtsd2si\t{$src, $dst|$dst, $src}">, XD, VEX;
defm VCVTSD2SI64 : sse12_cvt_s_np<0x2D, FR64, GR64, f64mem,
defm VCVTSD2SI64 : sse12_cvt_s<0x2D, FR64, GR64, undef, f64mem, load,
"cvtsd2si\t{$src, $dst|$dst, $src}">, XD, VEX, VEX_W;
}
defm CVTSD2SI : sse12_cvt_sint<0x2D, VR128, GR32, int_x86_sse2_cvtsd2si,
f128mem, load, "cvtsd2si{l}">, XD;
defm CVTSD2SI64 : sse12_cvt_sint<0x2D, VR128, GR64, int_x86_sse2_cvtsd2si64,

9
test/MC/Disassembler/X86/simple-tests.txt
View File

@ -87,3 +87,12 @@
# CHECK: vandps (%rdx), %xmm1, %xmm7
0xc5 0xf0 0x54 0x3a
# CHECK: vcvtss2sil %xmm0, %eax
0xc5 0xfa 0x2d 0xc0
# CHECK: vcvtsd2si %xmm0, %eax
0xc5 0xfb 0x2d 0xc0
# CHECK: vcvtsd2si %xmm0, %rax
0xc4 0xe1 0xfb 0x2d 0xc0