6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-19 03:29:22 +00:00
Code Issues Projects Releases Wiki Activity

Use SelectRoot() as the entry to any tblgen based isel.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25998 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-02-05 06:51:51 +00:00
parent ba2f0a9ee5
commit 900c826bc7
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/Sparc/SparcISelDAGToDAG.cpp
View File

@ -24,6 +24,7 @@
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Debug.h"
#include <iostream>
#include <set>
using namespace llvm;
//===----------------------------------------------------------------------===//
@ -958,7 +959,7 @@ void SparcDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
DEBUG(BB->dump());
// Select target instructions for the DAG.
DAG.setRoot(Select(DAG.getRoot()));
DAG.setRoot(SelectRoot(DAG.getRoot()));
CodeGenMap.clear();
DAG.RemoveDeadNodes();