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Use SelectRoot() as the entry to any tblgen based isel.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25998 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2006-02-05 06:51:51 +00:00
parent ba2f0a9ee5
commit 900c826bc7
1 changed files with 2 additions and 1 deletions
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3
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@ -24,6 +24,7 @@
#include "llvm/Target/TargetLowering.h" #include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Debug.h" #include "llvm/Support/Debug.h"
#include <iostream> #include <iostream>
#include <set>
using namespace llvm; using namespace llvm;
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
@ -958,7 +959,7 @@ void SparcDAGToDAGISel::InstructionSelectBasicBlock(SelectionDAG &DAG) {
DEBUG(BB->dump()); DEBUG(BB->dump());
// Select target instructions for the DAG. // Select target instructions for the DAG.
DAG.setRoot(Select(DAG.getRoot())); DAG.setRoot(SelectRoot(DAG.getRoot()));
CodeGenMap.clear(); CodeGenMap.clear();
DAG.RemoveDeadNodes(); DAG.RemoveDeadNodes();