From 903456245bda41adc90dcab67623169ee3aaff8b Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Fri, 16 Dec 2011 19:08:59 +0000 Subject: [PATCH] Hexagon: Fix a nasty order-of-initialization bug. Reenable the tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146750 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonTargetMachine.cpp | 2 +- lib/Target/Hexagon/HexagonTargetMachine.h | 2 +- test/CodeGen/Hexagon/args.ll | 3 +-- test/CodeGen/Hexagon/combine.ll | 3 +-- test/CodeGen/Hexagon/double.ll | 3 +-- test/CodeGen/Hexagon/float.ll | 3 +-- test/CodeGen/Hexagon/frame.ll | 3 +-- test/CodeGen/Hexagon/mpy.ll | 3 +-- test/CodeGen/Hexagon/static.ll | 3 +-- test/CodeGen/Hexagon/struct_args.ll | 3 +-- test/CodeGen/Hexagon/struct_args_large.ll | 3 +-- test/CodeGen/Hexagon/vaddh.ll | 3 +-- 12 files changed, 12 insertions(+), 22 deletions(-) diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp index b29e92c0c68..ee09dafd2b1 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -56,7 +56,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, StringRef TT, CodeGenOpt::Level OL) : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), DataLayout("e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-a0:0") , - Subtarget(TT, CPU, FS), TLInfo(*this), InstrInfo(Subtarget), + Subtarget(TT, CPU, FS), InstrInfo(Subtarget), TLInfo(*this), TSInfo(*this), FrameLowering(Subtarget), InstrItins(&Subtarget.getInstrItineraryData()) { diff --git a/lib/Target/Hexagon/HexagonTargetMachine.h b/lib/Target/Hexagon/HexagonTargetMachine.h index e27d3ae9433..712cf3d5eae 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.h +++ b/lib/Target/Hexagon/HexagonTargetMachine.h @@ -29,8 +29,8 @@ class Module; class HexagonTargetMachine : public LLVMTargetMachine { const TargetData DataLayout; // Calculates type size & alignment. HexagonSubtarget Subtarget; - HexagonTargetLowering TLInfo; HexagonInstrInfo InstrInfo; + HexagonTargetLowering TLInfo; HexagonSelectionDAGInfo TSInfo; HexagonFrameLowering FrameLowering; const InstrItineraryData* InstrItins; diff --git a/test/CodeGen/Hexagon/args.ll b/test/CodeGen/Hexagon/args.ll index b882cf7f144..4ebcaec3081 100644 --- a/test/CodeGen/Hexagon/args.ll +++ b/test/CodeGen/Hexagon/args.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: r[[T0:[0-9]+]] = #7 ; CHECK: memw(r29 + #0) = r[[T0]] ; CHECK: r0 = #1 diff --git a/test/CodeGen/Hexagon/combine.ll b/test/CodeGen/Hexagon/combine.ll index 36abd74d762..721998596c8 100644 --- a/test/CodeGen/Hexagon/combine.ll +++ b/test/CodeGen/Hexagon/combine.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: combine(r{{[0-9]+}}, r{{[0-9]+}}) @j = external global i32 diff --git a/test/CodeGen/Hexagon/double.ll b/test/CodeGen/Hexagon/double.ll index 04c2ec157ec..c3b6f378ec8 100644 --- a/test/CodeGen/Hexagon/double.ll +++ b/test/CodeGen/Hexagon/double.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: __hexagon_adddf3 ; CHECK: __hexagon_subdf3 diff --git a/test/CodeGen/Hexagon/float.ll b/test/CodeGen/Hexagon/float.ll index 51acf2e501c..bec9f5852e3 100644 --- a/test/CodeGen/Hexagon/float.ll +++ b/test/CodeGen/Hexagon/float.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: __hexagon_addsf3 ; CHECK: __hexagon_subsf3 diff --git a/test/CodeGen/Hexagon/frame.ll b/test/CodeGen/Hexagon/frame.ll index c0a9fda4689..dc87c732d6f 100644 --- a/test/CodeGen/Hexagon/frame.ll +++ b/test/CodeGen/Hexagon/frame.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s @num = external global i32 @acc = external global i32 diff --git a/test/CodeGen/Hexagon/mpy.ll b/test/CodeGen/Hexagon/mpy.ll index afd6fc60718..d5c5ae34535 100644 --- a/test/CodeGen/Hexagon/mpy.ll +++ b/test/CodeGen/Hexagon/mpy.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: += mpyi define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind { diff --git a/test/CodeGen/Hexagon/static.ll b/test/CodeGen/Hexagon/static.ll index c251bd49163..843b7cbb7a0 100644 --- a/test/CodeGen/Hexagon/static.ll +++ b/test/CodeGen/Hexagon/static.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s @num = external global i32 @acc = external global i32 diff --git a/test/CodeGen/Hexagon/struct_args.ll b/test/CodeGen/Hexagon/struct_args.ll index 2c962d0961d..cc409db562a 100644 --- a/test/CodeGen/Hexagon/struct_args.ll +++ b/test/CodeGen/Hexagon/struct_args.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: r1:0 = or(r{{[0-9]}}:{{[0-9]}}, r{{[0-9]}}:{{[0-9]}}) %struct.small = type { i32, i32 } diff --git a/test/CodeGen/Hexagon/struct_args_large.ll b/test/CodeGen/Hexagon/struct_args_large.ll index 69de4f66a92..af099cdc43c 100644 --- a/test/CodeGen/Hexagon/struct_args_large.ll +++ b/test/CodeGen/Hexagon/struct_args_large.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: r[[T0:[0-9]+]] = CONST32(#s2) ; CHECK: r[[T1:[0-9]+]] = memw(r[[T0]] + #0) ; CHECK: memw(r29 + #0) = r[[T1]] diff --git a/test/CodeGen/Hexagon/vaddh.ll b/test/CodeGen/Hexagon/vaddh.ll index 788e4749f5a..01d20410978 100644 --- a/test/CodeGen/Hexagon/vaddh.ll +++ b/test/CodeGen/Hexagon/vaddh.ll @@ -1,5 +1,4 @@ -; RUN: true -; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}}) @j = external global i32