diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 265209c6820..2c5b9dad428 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -557,17 +557,32 @@ SDOperand ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT::ValueType NVT, static SDOperand ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG, TargetLowering &TLI) { - assert(MVT::isInteger(ST->getStoredVT()) && - "Non integer unaligned stores not implemented."); - int SVOffset = ST->getSrcValueOffset(); SDOperand Chain = ST->getChain(); SDOperand Ptr = ST->getBasePtr(); SDOperand Val = ST->getValue(); MVT::ValueType VT = Val.getValueType(); + int Alignment = ST->getAlignment(); + int SVOffset = ST->getSrcValueOffset(); + if (MVT::isFloatingPoint(ST->getStoredVT())) { + // Expand to a bitconvert of the value to the integer type of the + // same size, then a (misaligned) int store. + MVT::ValueType intVT; + if (VT==MVT::f64) + intVT = MVT::i64; + else if (VT==MVT::f32) + intVT = MVT::i32; + else + assert(0 && "Unaligned load of unsupported floating point type"); + + SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, intVT, Val); + return DAG.getStore(Chain, Result, Ptr, ST->getSrcValue(), + SVOffset, ST->isVolatile(), Alignment); + } + assert(MVT::isInteger(ST->getStoredVT()) && + "Unaligned store of unknown type."); // Get the half-size VT MVT::ValueType NewStoredVT = ST->getStoredVT() - 1; int NumBits = MVT::getSizeInBits(NewStoredVT); - int Alignment = ST->getAlignment(); int IncrementSize = NumBits / 8; // Divide the stored value in two parts. @@ -593,13 +608,35 @@ SDOperand ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG, static SDOperand ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG, TargetLowering &TLI) { - assert(MVT::isInteger(LD->getLoadedVT()) && - "Non integer unaligned loads not implemented."); int SVOffset = LD->getSrcValueOffset(); SDOperand Chain = LD->getChain(); SDOperand Ptr = LD->getBasePtr(); MVT::ValueType VT = LD->getValueType(0); - MVT::ValueType NewLoadedVT = LD->getLoadedVT() - 1; + MVT::ValueType LoadedVT = LD->getLoadedVT(); + if (MVT::isFloatingPoint(VT)) { + // Expand to a (misaligned) integer load of the same size, + // then bitconvert to floating point. + MVT::ValueType intVT; + if (LoadedVT==MVT::f64) + intVT = MVT::i64; + else if (LoadedVT==MVT::f32) + intVT = MVT::i32; + else + assert(0 && "Unaligned load of unsupported floating point type"); + + SDOperand newLoad = DAG.getLoad(intVT, Chain, Ptr, LD->getSrcValue(), + SVOffset, LD->isVolatile(), + LD->getAlignment()); + SDOperand Result = DAG.getNode(ISD::BIT_CONVERT, LoadedVT, newLoad); + if (LoadedVT != VT) + Result = DAG.getNode(ISD::FP_EXTEND, VT, Result); + + SDOperand Ops[] = { Result, Chain }; + return DAG.getNode(ISD::MERGE_VALUES, DAG.getVTList(VT, MVT::Other), + Ops, 2); + } + assert(MVT::isInteger(LoadedVT) && "Unaligned load of unsupported type."); + MVT::ValueType NewLoadedVT = LoadedVT - 1; int NumBits = MVT::getSizeInBits(NewLoadedVT); int Alignment = LD->getAlignment(); int IncrementSize = NumBits / 8; @@ -1640,8 +1677,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { TLI); Tmp3 = Result.getOperand(0); Tmp4 = Result.getOperand(1); - LegalizeOp(Tmp3); - LegalizeOp(Tmp4); + Tmp3 = LegalizeOp(Tmp3); + Tmp4 = LegalizeOp(Tmp4); } } break; @@ -1709,8 +1746,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { TLI); Tmp1 = Result.getOperand(0); Tmp2 = Result.getOperand(1); - LegalizeOp(Tmp1); - LegalizeOp(Tmp2); + Tmp1 = LegalizeOp(Tmp1); + Tmp2 = LegalizeOp(Tmp2); } } } diff --git a/test/CodeGen/PowerPC/2007-09-08-unaligned.ll b/test/CodeGen/PowerPC/2007-09-08-unaligned.ll new file mode 100644 index 00000000000..f6bd3337aef --- /dev/null +++ b/test/CodeGen/PowerPC/2007-09-08-unaligned.ll @@ -0,0 +1,53 @@ +; RUN: llvm-as < %s | llc | grep stfd | count 3 +; RUN: llvm-as < %s | llc | grep stfs | count 1 +; RUN: llvm-as < %s | llc | grep lfd | count 2 +; RUN: llvm-as < %s | llc | grep lfs | count 2 +; ModuleID = 'foo.c' +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" +target triple = "powerpc-apple-darwin8" + %struct.anon = type <{ i8, float }> +@s = global %struct.anon <{ i8 3, float 0x4014666660000000 }> ; <%struct.anon*> [#uses=1] +@u = global <{ i8, double }> <{ i8 3, double 5.100000e+00 }> ; <<{ i8, double }>*> [#uses=1] +@t = weak global %struct.anon zeroinitializer ; <%struct.anon*> [#uses=2] +@v = weak global <{ i8, double }> zeroinitializer ; <<{ i8, double }>*> [#uses=2] +@.str = internal constant [8 x i8] c"%f %lf\0A\00" ; <[8 x i8]*> [#uses=1] + +define i32 @foo() { +entry: + %retval = alloca i32, align 4 ; [#uses=1] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + %tmp = getelementptr %struct.anon* @s, i32 0, i32 1 ; [#uses=1] + %tmp1 = load float* %tmp, align 1 ; [#uses=1] + %tmp2 = getelementptr %struct.anon* @t, i32 0, i32 1 ; [#uses=1] + store float %tmp1, float* %tmp2, align 1 + %tmp3 = getelementptr <{ i8, double }>* @u, i32 0, i32 1 ; [#uses=1] + %tmp4 = load double* %tmp3, align 1 ; [#uses=1] + %tmp5 = getelementptr <{ i8, double }>* @v, i32 0, i32 1 ; [#uses=1] + store double %tmp4, double* %tmp5, align 1 + br label %return + +return: ; preds = %entry + %retval6 = load i32* %retval ; [#uses=1] + ret i32 %retval6 +} + +define i32 @main() { +entry: + %retval = alloca i32, align 4 ; [#uses=1] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + %tmp = call i32 @foo( ) ; [#uses=0] + %tmp1 = getelementptr %struct.anon* @t, i32 0, i32 1 ; [#uses=1] + %tmp2 = load float* %tmp1, align 1 ; [#uses=1] + %tmp23 = fpext float %tmp2 to double ; [#uses=1] + %tmp4 = getelementptr <{ i8, double }>* @v, i32 0, i32 1 ; [#uses=1] + %tmp5 = load double* %tmp4, align 1 ; [#uses=1] + %tmp6 = getelementptr [8 x i8]* @.str, i32 0, i32 0 ; [#uses=1] + %tmp7 = call i32 (i8*, ...)* @printf( i8* %tmp6, double %tmp23, double %tmp5 ) ; [#uses=0] + br label %return + +return: ; preds = %entry + %retval8 = load i32* %retval ; [#uses=1] + ret i32 %retval8 +} + +declare i32 @printf(i8*, ...)