From 9097d14e575fa54dcf28dfd1ae0c9ebe6931dce1 Mon Sep 17 00:00:00 2001
From: Arnold Schwaighofer
Date: Wed, 14 May 2008 09:17:12 +0000
Subject: [PATCH] Add documentation for tail call optimization to
CodeGenerator.html. Add a link referring to it to LangRef.html.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51097 91177308-0d34-0410-b5e6-96231b3b80d8
---
docs/CodeGenerator.html | 45 +++++++++++++++++++++++++++++++++++++++++
docs/LangRef.html | 8 +++++---
2 files changed, 50 insertions(+), 3 deletions(-)
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index d0eb1d51050..c09d9e1cd70 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -84,6 +84,7 @@
Target-specific Implementation Notes
+
+
+
Tail call optimization, callee reusing the stack of the caller, is currently supported on x86/x86-64 and PowerPC. It is performed if:
+
+ - Caller and callee have the calling convention fastcc.
+ - The call is a tail call - in tail position (ret immediately follows call and ret uses value of call or is void).
+ - Option -tailcallopt is enabled.
+ - Platform specific constraints are met.
+
+
+
+
x86/x86-64 constraints:
+
+ - No variable argument lists are used.
+ - On x86-64 when generating GOT/PIC code only module-local calls (visibility = hidden or protected) are supported.
+
+
+
PowerPC constraints:
+
+ - No variable argument lists are used.
+ - No byval parameters are used.
+ - On ppc32/64 GOT/PIC only module-local calls (visibility = hidden or protected) are supported.
+
+
+
Example:
+
Call as llc -tailcallopt test.ll.
+
+
+declare fastcc i32 @tailcallee(i32 inreg %a1, i32 inreg %a2, i32 %a3, i32 %a4)
+
+define fastcc i32 @tailcaller(i32 %in1, i32 %in2) {
+ %l1 = add i32 %in1, %in2
+ %tmp = tail call fastcc i32 @tailcallee(i32 %in1 inreg, i32 %in2 inreg, i32 %in1, i32 %l1)
+ ret i32 %tmp
+}
+
+
+
Implications of -tailcallopt:
+
To support tail call optimization in situations where the callee has more arguments than the caller a 'callee pops arguments' convention is used. This currently causes each fastcc call that is not tail call optimized (because one or more of above constraints are not met) to be followed by a readjustment of the stack. So performance might be worse in such cases.
+
On x86 and x86-64 one register is reserved for indirect tail calls (e.g via a function pointer). So there is one less register for integer argument passing. For x86 this means 2 registers (if inreg parameter attribute is used) and for x86-64 this means 5 register are used.
+
The X86 backend
diff --git a/docs/LangRef.html b/docs/LangRef.html
index 44288874432..8adc4d7a0f6 100644
--- a/docs/LangRef.html
+++ b/docs/LangRef.html
@@ -586,9 +586,11 @@ the future:
(e.g. by passing things in registers). This calling convention allows the
target to use whatever tricks it wants to produce fast code for the target,
without having to conform to an externally specified ABI. Implementations of
- this convention should allow arbitrary tail call optimization to be supported.
- This calling convention does not support varargs and requires the prototype of
- all callees to exactly match the prototype of the function definition.
+ this convention should allow arbitrary
+
tail call optimization to be
+ supported. This calling convention does not support varargs and requires the
+ prototype of all callees to exactly match the prototype of the function
+ definition.
"coldcc" - The cold calling convention: