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Templatify RegReductionPriorityQueue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28212 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -892,12 +892,13 @@ void ScheduleDAGList::ListScheduleTopDown() {
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// to reduce register pressure.
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// to reduce register pressure.
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//
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//
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namespace {
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namespace {
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template<class SF>
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class RegReductionPriorityQueue;
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class RegReductionPriorityQueue;
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/// Sorting functions for the Available queue.
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/// Sorting functions for the Available queue.
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struct ls_rr_sort : public std::binary_function<SUnit*, SUnit*, bool> {
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struct ls_rr_sort : public std::binary_function<SUnit*, SUnit*, bool> {
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RegReductionPriorityQueue *SPQ;
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RegReductionPriorityQueue<ls_rr_sort> *SPQ;
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ls_rr_sort(RegReductionPriorityQueue *spq) : SPQ(spq) {}
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ls_rr_sort(RegReductionPriorityQueue<ls_rr_sort> *spq) : SPQ(spq) {}
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ls_rr_sort(const ls_rr_sort &RHS) : SPQ(RHS.SPQ) {}
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ls_rr_sort(const ls_rr_sort &RHS) : SPQ(RHS.SPQ) {}
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bool operator()(const SUnit* left, const SUnit* right) const;
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bool operator()(const SUnit* left, const SUnit* right) const;
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@ -905,6 +906,7 @@ namespace {
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} // end anonymous namespace
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} // end anonymous namespace
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namespace {
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namespace {
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template<class SF>
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class RegReductionPriorityQueue : public SchedulingPriorityQueue {
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class RegReductionPriorityQueue : public SchedulingPriorityQueue {
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// SUnits - The SUnits for the current graph.
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// SUnits - The SUnits for the current graph.
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const std::vector<SUnit> *SUnits;
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const std::vector<SUnit> *SUnits;
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@ -912,7 +914,7 @@ namespace {
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// SethiUllmanNumbers - The SethiUllman number for each node.
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// SethiUllmanNumbers - The SethiUllman number for each node.
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std::vector<int> SethiUllmanNumbers;
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std::vector<int> SethiUllmanNumbers;
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std::priority_queue<SUnit*, std::vector<SUnit*>, ls_rr_sort> Queue;
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std::priority_queue<SUnit*, std::vector<SUnit*>, SF> Queue;
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public:
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public:
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RegReductionPriorityQueue() :
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RegReductionPriorityQueue() :
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Queue(ls_rr_sort(this)) {}
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Queue(ls_rr_sort(this)) {}
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@ -1079,7 +1081,8 @@ static bool canClobber(SUnit *SU, SUnit *Op) {
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/// it as a def&use operand. Add a pseudo control edge from it to the other
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/// it as a def&use operand. Add a pseudo control edge from it to the other
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/// node (if it won't create a cycle) so the two-address one will be scheduled
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/// node (if it won't create a cycle) so the two-address one will be scheduled
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/// first (lower in the schedule).
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/// first (lower in the schedule).
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void RegReductionPriorityQueue::AddPseudoTwoAddrDeps() {
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template<class SF>
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void RegReductionPriorityQueue<SF>::AddPseudoTwoAddrDeps() {
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i) {
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i) {
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SUnit *SU = (SUnit *)&((*SUnits)[i]);
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SUnit *SU = (SUnit *)&((*SUnits)[i]);
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SDNode *Node = SU->Node;
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SDNode *Node = SU->Node;
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@ -1112,7 +1115,8 @@ void RegReductionPriorityQueue::AddPseudoTwoAddrDeps() {
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/// CalcNodePriority - Priority is the Sethi Ullman number.
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/// CalcNodePriority - Priority is the Sethi Ullman number.
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/// Smaller number is the higher priority.
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/// Smaller number is the higher priority.
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int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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template<class SF>
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int RegReductionPriorityQueue<SF>::CalcNodePriority(const SUnit *SU) {
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int &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
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int &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
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if (SethiUllmanNumber != 0)
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if (SethiUllmanNumber != 0)
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return SethiUllmanNumber;
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return SethiUllmanNumber;
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@ -1150,7 +1154,8 @@ int RegReductionPriorityQueue::CalcNodePriority(const SUnit *SU) {
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}
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}
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/// CalculatePriorities - Calculate priorities of all scheduling units.
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/// CalculatePriorities - Calculate priorities of all scheduling units.
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void RegReductionPriorityQueue::CalculatePriorities() {
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template<class SF>
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void RegReductionPriorityQueue<SF>::CalculatePriorities() {
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SethiUllmanNumbers.assign(SUnits->size(), 0);
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SethiUllmanNumbers.assign(SUnits->size(), 0);
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i)
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for (unsigned i = 0, e = SUnits->size(); i != e; ++i)
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@ -1386,7 +1391,7 @@ void LatencyPriorityQueue::AdjustPriorityOfUnscheduledPreds(SUnit *SU) {
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llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAG &DAG,
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llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAG &DAG,
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MachineBasicBlock *BB) {
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MachineBasicBlock *BB) {
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return new ScheduleDAGList(DAG, BB, DAG.getTarget(), true,
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return new ScheduleDAGList(DAG, BB, DAG.getTarget(), true,
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new RegReductionPriorityQueue(),
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new RegReductionPriorityQueue<ls_rr_sort>(),
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new HazardRecognizer());
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new HazardRecognizer());
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}
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}
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