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https://github.com/c64scene-ar/llvm-6502.git
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* Wrap long lines
* Replace silent fall-through FIXME comments with an error to cerr and an abort * No need to set size of statically initialized arrays git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14404 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -368,8 +368,10 @@ unsigned ISel::getReg(Value *V, MachineBasicBlock *MBB,
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unsigned Reg1 = makeAnotherReg(V->getType());
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unsigned Reg2 = makeAnotherReg(V->getType());
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// Move the address of the global into the register
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BuildMI(*MBB, IPt, PPC32::LOADHiAddr, 2, Reg1).addReg(PPC32::R0).addGlobalAddress(GV);
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BuildMI(*MBB, IPt, PPC32::LOADLoAddr, 2, Reg2).addReg(Reg1).addGlobalAddress(GV);
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BuildMI(*MBB, IPt, PPC32::LOADHiAddr, 2, Reg1).addReg(PPC32::R0)
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.addGlobalAddress(GV);
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BuildMI(*MBB, IPt, PPC32::LOADLoAddr, 2, Reg2).addReg(Reg1)i
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.addGlobalAddress(GV);
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return Reg2;
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} else if (CastInst *CI = dyn_cast<CastInst>(V)) {
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// Do not emit noop casts at all.
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@ -483,9 +485,12 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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uint64_t Val = cast<ConstantInt>(C)->getRawValue();
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unsigned hiTmp = makeAnotherReg(Type::IntTy);
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unsigned loTmp = makeAnotherReg(Type::IntTy);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, loTmp).addReg(PPC32::R0).addImm(Val >> 48);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(loTmp).addImm((Val >> 32) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, hiTmp).addReg(PPC32::R0).addImm((Val >> 16) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, loTmp).addReg(PPC32::R0)
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.addImm(Val >> 48);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(loTmp)
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.addImm((Val >> 32) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, hiTmp).addReg(PPC32::R0)
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.addImm((Val >> 16) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R+1).addReg(hiTmp).addImm(Val & 0xFFFF);
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return;
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}
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@ -493,19 +498,24 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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assert(Class <= cInt && "Type not handled yet!");
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if (C->getType() == Type::BoolTy) {
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0).addImm(C == ConstantBool::True);
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0)
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.addImm(C == ConstantBool::True);
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} else if (Class == cByte || Class == cShort) {
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ConstantInt *CI = cast<ConstantInt>(C);
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0).addImm(CI->getRawValue());
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0)
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.addImm(CI->getRawValue());
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} else {
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ConstantInt *CI = cast<ConstantInt>(C);
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int TheVal = CI->getRawValue() & 0xFFFFFFFF;
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if (TheVal < 32768 && TheVal >= -32768) {
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0).addImm(CI->getRawValue());
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0)
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.addImm(CI->getRawValue());
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} else {
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unsigned TmpReg = makeAnotherReg(Type::IntTy);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, TmpReg).addReg(PPC32::R0).addImm(CI->getRawValue() >> 16);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(TmpReg).addImm(CI->getRawValue() & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, TmpReg).addReg(PPC32::R0)
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.addImm(CI->getRawValue() >> 16);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(TmpReg)
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.addImm(CI->getRawValue() & 0xFFFF);
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}
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}
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
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@ -514,7 +524,7 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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unsigned CPI = CP->getConstantPoolIndex(CFP);
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const Type *Ty = CFP->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned LoadOpcode = Ty == Type::FloatTy ? PPC32::LFS : PPC32::LFD;
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addConstantPoolReference(BuildMI(*MBB, IP, LoadOpcode, 2, R), CPI);
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} else if (isa<ConstantPointerNull>(C)) {
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@ -848,6 +858,8 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
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//
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// FIXME: Not Yet Implemented
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std::cerr << "EmitComparison unimplemented: Opnum >= 2\n";
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abort();
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return OpNum;
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}
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}
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@ -887,6 +899,8 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
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//
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// FIXME: Not Yet Implemented
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std::cerr << "EmitComparison (cLong) unimplemented: Opnum >= 2\n";
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abort();
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return OpNum;
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}
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}
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@ -1537,7 +1551,7 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
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}
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// General case.
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static const unsigned OpcodeTab[4] = {
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static const unsigned OpcodeTab[] = {
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PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV
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};
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@ -1561,7 +1575,7 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
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unsigned Class = getClassB(Op0->getType());
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// Arithmetic and Bitwise operators
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static const unsigned OpcodeTab[5] = {
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static const unsigned OpcodeTab[] = {
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PPC32::ADD, PPC32::SUB, PPC32::AND, PPC32::OR, PPC32::XOR
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};
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// Otherwise, code generate the full operation with a constant.
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@ -368,8 +368,10 @@ unsigned ISel::getReg(Value *V, MachineBasicBlock *MBB,
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unsigned Reg1 = makeAnotherReg(V->getType());
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unsigned Reg2 = makeAnotherReg(V->getType());
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// Move the address of the global into the register
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BuildMI(*MBB, IPt, PPC32::LOADHiAddr, 2, Reg1).addReg(PPC32::R0).addGlobalAddress(GV);
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BuildMI(*MBB, IPt, PPC32::LOADLoAddr, 2, Reg2).addReg(Reg1).addGlobalAddress(GV);
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BuildMI(*MBB, IPt, PPC32::LOADHiAddr, 2, Reg1).addReg(PPC32::R0)
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.addGlobalAddress(GV);
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BuildMI(*MBB, IPt, PPC32::LOADLoAddr, 2, Reg2).addReg(Reg1)i
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.addGlobalAddress(GV);
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return Reg2;
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} else if (CastInst *CI = dyn_cast<CastInst>(V)) {
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// Do not emit noop casts at all.
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@ -483,9 +485,12 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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uint64_t Val = cast<ConstantInt>(C)->getRawValue();
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unsigned hiTmp = makeAnotherReg(Type::IntTy);
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unsigned loTmp = makeAnotherReg(Type::IntTy);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, loTmp).addReg(PPC32::R0).addImm(Val >> 48);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(loTmp).addImm((Val >> 32) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, hiTmp).addReg(PPC32::R0).addImm((Val >> 16) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, loTmp).addReg(PPC32::R0)
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.addImm(Val >> 48);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(loTmp)
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.addImm((Val >> 32) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, hiTmp).addReg(PPC32::R0)
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.addImm((Val >> 16) & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R+1).addReg(hiTmp).addImm(Val & 0xFFFF);
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return;
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}
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@ -493,19 +498,24 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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assert(Class <= cInt && "Type not handled yet!");
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if (C->getType() == Type::BoolTy) {
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0).addImm(C == ConstantBool::True);
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0)
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.addImm(C == ConstantBool::True);
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} else if (Class == cByte || Class == cShort) {
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ConstantInt *CI = cast<ConstantInt>(C);
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0).addImm(CI->getRawValue());
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0)
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.addImm(CI->getRawValue());
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} else {
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ConstantInt *CI = cast<ConstantInt>(C);
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int TheVal = CI->getRawValue() & 0xFFFFFFFF;
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if (TheVal < 32768 && TheVal >= -32768) {
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0).addImm(CI->getRawValue());
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BuildMI(*MBB, IP, PPC32::ADDI, 2, R).addReg(PPC32::R0)
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.addImm(CI->getRawValue());
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} else {
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unsigned TmpReg = makeAnotherReg(Type::IntTy);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, TmpReg).addReg(PPC32::R0).addImm(CI->getRawValue() >> 16);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(TmpReg).addImm(CI->getRawValue() & 0xFFFF);
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BuildMI(*MBB, IP, PPC32::ADDIS, 2, TmpReg).addReg(PPC32::R0)
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.addImm(CI->getRawValue() >> 16);
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BuildMI(*MBB, IP, PPC32::ORI, 2, R).addReg(TmpReg)
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.addImm(CI->getRawValue() & 0xFFFF);
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}
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}
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} else if (ConstantFP *CFP = dyn_cast<ConstantFP>(C)) {
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@ -514,7 +524,7 @@ void ISel::copyConstantToRegister(MachineBasicBlock *MBB,
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unsigned CPI = CP->getConstantPoolIndex(CFP);
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const Type *Ty = CFP->getType();
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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assert(Ty == Type::FloatTy || Ty == Type::DoubleTy && "Unknown FP type!");
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unsigned LoadOpcode = Ty == Type::FloatTy ? PPC32::LFS : PPC32::LFD;
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addConstantPoolReference(BuildMI(*MBB, IP, LoadOpcode, 2, R), CPI);
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} else if (isa<ConstantPointerNull>(C)) {
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@ -848,6 +858,8 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
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//
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// FIXME: Not Yet Implemented
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std::cerr << "EmitComparison unimplemented: Opnum >= 2\n";
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abort();
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return OpNum;
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}
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}
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@ -887,6 +899,8 @@ unsigned ISel::EmitComparison(unsigned OpNum, Value *Op0, Value *Op1,
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//
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// FIXME: Not Yet Implemented
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std::cerr << "EmitComparison (cLong) unimplemented: Opnum >= 2\n";
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abort();
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return OpNum;
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}
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}
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@ -1537,7 +1551,7 @@ void ISel::emitBinaryFPOperation(MachineBasicBlock *BB,
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}
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// General case.
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static const unsigned OpcodeTab[4] = {
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static const unsigned OpcodeTab[] = {
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PPC32::FADD, PPC32::FSUB, PPC32::FMUL, PPC32::FDIV
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};
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@ -1561,7 +1575,7 @@ void ISel::emitSimpleBinaryOperation(MachineBasicBlock *MBB,
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unsigned Class = getClassB(Op0->getType());
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// Arithmetic and Bitwise operators
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static const unsigned OpcodeTab[5] = {
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static const unsigned OpcodeTab[] = {
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PPC32::ADD, PPC32::SUB, PPC32::AND, PPC32::OR, PPC32::XOR
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};
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// Otherwise, code generate the full operation with a constant.
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