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Merging r181579:
------------------------------------------------------------------------ r181579 | tstellar | 2013-05-09 19:09:39 -0700 (Thu, 09 May 2013) | 8 lines R600: Expand SUB for v2i32/v4i32 Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181953 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -54,6 +54,8 @@ R600TargetLowering::R600TargetLowering(TargetMachine &TM) :
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setOperationAction(ISD::SRL, MVT::v2i32, Expand);
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setOperationAction(ISD::SRA, MVT::v4i32, Expand);
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setOperationAction(ISD::SRA, MVT::v2i32, Expand);
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setOperationAction(ISD::SUB, MVT::v4i32, Expand);
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setOperationAction(ISD::SUB, MVT::v2i32, Expand);
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setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Expand);
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setOperationAction(ISD::UDIV, MVT::v4i32, Expand);
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setOperationAction(ISD::UREM, MVT::v4i32, Expand);
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15
test/CodeGen/R600/sub.ll
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15
test/CodeGen/R600/sub.ll
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@ -0,0 +1,15 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;CHECK: SUB_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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;CHECK: SUB_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32> addrspace(1) * %in
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%b = load <4 x i32> addrspace(1) * %b_ptr
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%result = sub <4 x i32> %a, %b
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store <4 x i32> %result, <4 x i32> addrspace(1)* %out
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ret void
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}
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