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[Modules] Fix potential ODR violations by sinking the DEBUG_TYPE

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definition below all of the header #include lines, TableGen edition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206846 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chandler Carruth 2014-04-22 03:06:00 +00:00
parent 0d338a59bd
commit 915c29c11c
7 changed files with 14 additions and 12 deletions
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4
utils/TableGen/CTagsEmitter.cpp
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@ -13,8 +13,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "ctags-emitter"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Support/MemoryBuffer.h"
#include "llvm/TableGen/Error.h"
@ -24,6 +22,8 @@
#include <vector>
using namespace llvm;
#define DEBUG_TYPE "ctags-emitter"
namespace llvm { extern SourceMgr SrcMgr; }
namespace {

4
utils/TableGen/CodeGenRegisters.cpp
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@ -12,8 +12,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "regalloc-emitter"
#include "CodeGenRegisters.h"
#include "CodeGenTarget.h"
#include "llvm/ADT/IntEqClasses.h"
@ -26,6 +24,8 @@
using namespace llvm;
#define DEBUG_TYPE "regalloc-emitter"
//===----------------------------------------------------------------------===//
// CodeGenSubRegIndex
//===----------------------------------------------------------------------===//

4
utils/TableGen/CodeGenSchedule.cpp
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@ -12,8 +12,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "subtarget-emitter"
#include "CodeGenSchedule.h"
#include "CodeGenTarget.h"
#include "llvm/ADT/STLExtras.h"
@ -23,6 +21,8 @@
using namespace llvm;
#define DEBUG_TYPE "subtarget-emitter"
#ifndef NDEBUG
static void dumpIdxVec(const IdxVec &V) {
for (unsigned i = 0, e = V.size(); i < e; ++i) {

3
utils/TableGen/DAGISelMatcherOpt.cpp
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@ -11,7 +11,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "isel-opt"
#include "DAGISelMatcher.h"
#include "CodeGenDAGPatterns.h"
#include "llvm/ADT/DenseSet.h"
@ -20,6 +19,8 @@
#include "llvm/Support/raw_ostream.h"
using namespace llvm;
#define DEBUG_TYPE "isel-opt"
/// ContractNodes - Turn multiple matcher node patterns like 'MoveChild+Record'
/// into single compound nodes like RecordChild.
static void ContractNodes(std::unique_ptr<Matcher> &MatcherPtr,

4
utils/TableGen/FixedLenDecoderEmitter.cpp
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@ -12,8 +12,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "decoder-emitter"
#include "CodeGenTarget.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/SmallString.h"
@ -34,6 +32,8 @@
using namespace llvm;
#define DEBUG_TYPE "decoder-emitter"
namespace {
struct EncodingField {
unsigned Base, Width, Offset;

3
utils/TableGen/PseudoLoweringEmitter.cpp
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@ -7,7 +7,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "pseudo-lowering"
#include "CodeGenInstruction.h"
#include "CodeGenTarget.h"
#include "llvm/ADT/IndexedMap.h"
@ -21,6 +20,8 @@
#include <vector>
using namespace llvm;
#define DEBUG_TYPE "pseudo-lowering"
namespace {
class PseudoLoweringEmitter {
struct OpData {

4
utils/TableGen/SubtargetEmitter.cpp
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@ -11,8 +11,6 @@
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "subtarget-emitter"
#include "CodeGenTarget.h"
#include "CodeGenSchedule.h"
#include "llvm/ADT/STLExtras.h"
@ -29,6 +27,8 @@
#include <vector>
using namespace llvm;
#define DEBUG_TYPE "subtarget-emitter"
namespace {
class SubtargetEmitter {
// Each processor has a SchedClassDesc table with an entry for each SchedClass.