mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-05 13:09:10 +00:00
Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause decoding conflicts in the new-style disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135434 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
3ba292dbc2
commit
91614aec48
@ -657,7 +657,7 @@ def tLDRspi : T1pIs<(outs tGPR:$Rt), (ins t_addrmode_sp:$addr), IIC_iLoad_i,
|
|||||||
|
|
||||||
// Load tconstpool
|
// Load tconstpool
|
||||||
// FIXME: Use ldr.n to work around a Darwin assembler bug.
|
// FIXME: Use ldr.n to work around a Darwin assembler bug.
|
||||||
let canFoldAsLoad = 1, isReMaterializable = 1 in
|
let canFoldAsLoad = 1, isReMaterializable = 1, isCodeGenOnly = 1 in
|
||||||
def tLDRpci : T1pIs<(outs tGPR:$Rt), (ins t_addrmode_pc:$addr), IIC_iLoad_i,
|
def tLDRpci : T1pIs<(outs tGPR:$Rt), (ins t_addrmode_pc:$addr), IIC_iLoad_i,
|
||||||
"ldr", ".n\t$Rt, $addr",
|
"ldr", ".n\t$Rt, $addr",
|
||||||
[(set tGPR:$Rt, (load (ARMWrapper tconstpool:$addr)))]>,
|
[(set tGPR:$Rt, (load (ARMWrapper tconstpool:$addr)))]>,
|
||||||
|
Loading…
Reference in New Issue
Block a user