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[SystemZ] Add the MVC instruction
This is the first use of D(L,B) addressing, which required a fair bit of surgery. For that reason, the patch just adds the instruction definition and the associated assembler and disassembler support. A later patch will actually make use of it for codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185433 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -49,7 +49,7 @@ private:
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SmallVectorImpl<MCFixup> &Fixups) const;
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// Called by the TableGen code to get the binary encoding of an address.
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// The index, if any, is encoded first, followed by the base,
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// The index or length, if any, is encoded first, followed by the base,
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// followed by the displacement. In a 20-bit displacement,
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// the low 12 bits are encoded before the high 8 bits.
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uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum,
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@@ -60,6 +60,8 @@ private:
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SmallVectorImpl<MCFixup> &Fixups) const;
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uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum,
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SmallVectorImpl<MCFixup> &Fixups) const;
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uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum,
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SmallVectorImpl<MCFixup> &Fixups) const;
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// Operand OpNum of MI needs a PC-relative fixup of kind Kind at
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// Offset bytes from the start of MI. Add the fixup to Fixups
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@@ -157,6 +159,16 @@ getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum,
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| ((Disp & 0xff000) >> 12);
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}
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uint64_t SystemZMCCodeEmitter::
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getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum,
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SmallVectorImpl<MCFixup> &Fixups) const {
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uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups);
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uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
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uint64_t Len = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups) - 1;
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assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<8>(Len));
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return (Len << 16) | (Base << 12) | Disp;
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}
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uint64_t
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SystemZMCCodeEmitter::getPCRelEncoding(const MCInst &MI, unsigned OpNum,
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SmallVectorImpl<MCFixup> &Fixups,
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