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When MachineLICM is hoisting a physical register after regalloc, make sure the

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register is not killed in the loop.

This fixes 188.ammp on ARM where the post-ra scheduler would grab a register
that looked available but wasn't.

A testcase would be huge and fragile, sorry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101930 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-04-20 18:45:47 +00:00
parent 56a1afb6b0
commit 9196ab6405
1 changed files with 17 additions and 4 deletions
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21
lib/CodeGen/MachineLICM.cpp
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@ -411,12 +411,25 @@ void MachineLICM::HoistRegionPostRA() {
delete[] PhysRegDefs;
}
/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the
/// current loop.
/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the current
/// loop, and make sure it is not killed by any instructions in the loop.
void MachineLICM::AddToLiveIns(unsigned Reg) {
const std::vector<MachineBasicBlock*> Blocks = CurLoop->getBlocks();
for (unsigned i = 0, e = Blocks.size(); i != e; ++i)
Blocks[i]->addLiveIn(Reg);
for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
MachineBasicBlock *BB = Blocks[i];
if (!BB->isLiveIn(Reg))
BB->addLiveIn(Reg);
for (MachineBasicBlock::iterator
MII = BB->begin(), E = BB->end(); MII != E; ++MII) {
MachineInstr *MI = &*MII;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;
if (MO.getReg() == Reg || TRI->isSuperRegister(Reg, MO.getReg()))
MO.setIsKill(false);
}
}
}
}
/// HoistPostRA - When an instruction is found to only use loop invariant