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When MachineLICM is hoisting a physical register after regalloc, make sure the
register is not killed in the loop. This fixes 188.ammp on ARM where the post-ra scheduler would grab a register that looked available but wasn't. A testcase would be huge and fragile, sorry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101930 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -411,12 +411,25 @@ void MachineLICM::HoistRegionPostRA() {
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delete[] PhysRegDefs;
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}
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/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the
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/// current loop.
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/// AddToLiveIns - Add register 'Reg' to the livein sets of BBs in the current
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/// loop, and make sure it is not killed by any instructions in the loop.
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void MachineLICM::AddToLiveIns(unsigned Reg) {
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const std::vector<MachineBasicBlock*> Blocks = CurLoop->getBlocks();
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for (unsigned i = 0, e = Blocks.size(); i != e; ++i)
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Blocks[i]->addLiveIn(Reg);
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for (unsigned i = 0, e = Blocks.size(); i != e; ++i) {
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MachineBasicBlock *BB = Blocks[i];
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if (!BB->isLiveIn(Reg))
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BB->addLiveIn(Reg);
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for (MachineBasicBlock::iterator
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MII = BB->begin(), E = BB->end(); MII != E; ++MII) {
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MachineInstr *MI = &*MII;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg() || !MO.getReg() || MO.isDef()) continue;
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if (MO.getReg() == Reg || TRI->isSuperRegister(Reg, MO.getReg()))
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MO.setIsKill(false);
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}
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}
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}
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}
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/// HoistPostRA - When an instruction is found to only use loop invariant
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