From 91a9b151308bdf068abc57e6dad7262b794be856 Mon Sep 17 00:00:00 2001 From: Vasileios Kalintiris Date: Thu, 2 Apr 2015 10:42:44 +0000 Subject: [PATCH] [mips] Expose adjustStackPtr() from MipsInstrInfo. NFC. Summary: adjustStackPtr() is implemented from both MipsSEInstrInfo and Mips16InstrInfo. It makes sense to expose this function from MipsInstrInfo and avoid explicit casting in some cases. Depends on D8638. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8640 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233905 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/Mips16FrameLowering.cpp | 5 +---- lib/Target/Mips/Mips16InstrInfo.h | 2 +- lib/Target/Mips/MipsInstrInfo.h | 4 ++++ lib/Target/Mips/MipsSEFrameLowering.cpp | 5 +---- lib/Target/Mips/MipsSEInstrInfo.h | 2 +- 5 files changed, 8 insertions(+), 10 deletions(-) diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp index abecfa0bac2..6e35de70b96 100644 --- a/lib/Target/Mips/Mips16FrameLowering.cpp +++ b/lib/Target/Mips/Mips16FrameLowering.cpp @@ -153,10 +153,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, if (I->getOpcode() == Mips::ADJCALLSTACKDOWN) Amount = -Amount; - const Mips16InstrInfo &TII = - *static_cast(STI.getInstrInfo()); - - TII.adjustStackPtr(Mips::SP, Amount, MBB, I); + STI.getInstrInfo()->adjustStackPtr(Mips::SP, Amount, MBB, I); } MBB.erase(I); diff --git a/lib/Target/Mips/Mips16InstrInfo.h b/lib/Target/Mips/Mips16InstrInfo.h index f9b738746ad..6540b40bc9a 100644 --- a/lib/Target/Mips/Mips16InstrInfo.h +++ b/lib/Target/Mips/Mips16InstrInfo.h @@ -77,7 +77,7 @@ public: /// Adjust SP by Amount bytes. void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const; + MachineBasicBlock::iterator I) const override; /// Emit a series of instructions to load an immediate. // This is to adjust some FrameReg. We return the new register to be used diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index 7b2b2892e69..45895355e1a 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -117,6 +117,10 @@ public: const TargetRegisterInfo *TRI, int64_t Offset) const = 0; + virtual void adjustStackPtr(unsigned SP, int64_t Amount, + MachineBasicBlock &MBB, + MachineBasicBlock::iterator I) const = 0; + /// Create an instruction which has the same operands and memory operands /// as MI but has a new opcode. MachineInstrBuilder genInstrWithNewOpc(unsigned NewOpc, diff --git a/lib/Target/Mips/MipsSEFrameLowering.cpp b/lib/Target/Mips/MipsSEFrameLowering.cpp index 7c79c4c564a..31ee78213cf 100644 --- a/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -611,9 +611,6 @@ MipsSEFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { void MipsSEFrameLowering:: eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const { - const MipsSEInstrInfo &TII = - *static_cast(STI.getInstrInfo()); - if (!hasReservedCallFrame(MF)) { int64_t Amount = I->getOperand(0).getImm(); @@ -621,7 +618,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, Amount = -Amount; unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP; - TII.adjustStackPtr(SP, Amount, MBB, I); + STI.getInstrInfo()->adjustStackPtr(SP, Amount, MBB, I); } MBB.erase(I); diff --git a/lib/Target/Mips/MipsSEInstrInfo.h b/lib/Target/Mips/MipsSEInstrInfo.h index d16fab2e92f..bebbabf7b83 100644 --- a/lib/Target/Mips/MipsSEInstrInfo.h +++ b/lib/Target/Mips/MipsSEInstrInfo.h @@ -68,7 +68,7 @@ public: /// Adjust SP by Amount bytes. void adjustStackPtr(unsigned SP, int64_t Amount, MachineBasicBlock &MBB, - MachineBasicBlock::iterator I) const; + MachineBasicBlock::iterator I) const override; /// Emit a series of instructions to load an immediate. If NewImm is a /// non-NULL parameter, the last instruction is not emitted, but instead