mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-13 04:38:24 +00:00
Add a bit to mark operands of asm's that conflict
with an earlyclobber operand elsewhere. Propagate this bit and the earlyclobber bit through SDISel. Change linear-scan RA not to allocate regs in a way that conflicts with an earlyclobber. See also comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -109,6 +109,7 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
|
||||
// register's use/def lists.
|
||||
if (isRegister()) {
|
||||
assert(!isEarlyClobber());
|
||||
assert(!isEarlyClobber() && !overlapsEarlyClobber());
|
||||
setReg(Reg);
|
||||
} else {
|
||||
// Otherwise, change this to a register and set the reg#.
|
||||
@ -128,6 +129,7 @@ void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
|
||||
IsKill = isKill;
|
||||
IsDead = isDead;
|
||||
IsEarlyClobber = false;
|
||||
OverlapsEarlyClobber = false;
|
||||
SubReg = 0;
|
||||
}
|
||||
|
||||
@ -183,13 +185,20 @@ void MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const {
|
||||
OS << "%mreg" << getReg();
|
||||
}
|
||||
|
||||
if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber()) {
|
||||
if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber() ||
|
||||
overlapsEarlyClobber()) {
|
||||
OS << "<";
|
||||
bool NeedComma = false;
|
||||
if (overlapsEarlyClobber()) {
|
||||
NeedComma = true;
|
||||
OS << "overlapsearly";
|
||||
}
|
||||
if (isImplicit()) {
|
||||
if (NeedComma) OS << ",";
|
||||
OS << (isDef() ? "imp-def" : "imp-use");
|
||||
NeedComma = true;
|
||||
} else if (isDef()) {
|
||||
if (NeedComma) OS << ",";
|
||||
if (isEarlyClobber())
|
||||
OS << "earlyclobber,";
|
||||
OS << "def";
|
||||
|
Reference in New Issue
Block a user