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Add a bit to mark operands of asm's that conflict

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with an earlyclobber operand elsewhere.  Propagate
this bit and the earlyclobber bit through SDISel.
Change linear-scan RA not to allocate regs in a way 
that conflicts with an earlyclobber.  See also comments.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56290 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dale Johannesen
2008-09-17 21:13:11 +00:00
parent 870e4bef41
commit 91aac1015e
11 changed files with 208 additions and 28 deletions
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6
lib/CodeGen/RegAllocLinearScan.cpp
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@@ -1050,7 +1050,8 @@ unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
TargetRegisterClass::iterator E = RC->allocation_order_end(*mf_);
assert(I != E && "No allocatable register in this register class!");
for (; I != E; ++I)
if (prt_->isRegAvail(*I)) {
if (prt_->isRegAvail(*I) &&
li_->noEarlyclobberConflict(cur->reg, *vrm_, *I)) {
FreeReg = *I;
if (FreeReg < inactiveCounts.size())
FreeRegInactiveCount = inactiveCounts[FreeReg];
@@ -1070,7 +1071,8 @@ unsigned RALinScan::getFreePhysReg(LiveInterval *cur) {
for (; I != E; ++I) {
unsigned Reg = *I;
if (prt_->isRegAvail(Reg) && Reg < inactiveCounts.size() &&
FreeRegInactiveCount < inactiveCounts[Reg]) {
FreeRegInactiveCount < inactiveCounts[Reg] &&
li_->noEarlyclobberConflict(cur->reg, *vrm_, Reg)) {
FreeReg = Reg;
FreeRegInactiveCount = inactiveCounts[Reg];
if (FreeRegInactiveCount == MaxInactiveCount)