diff --git a/lib/Target/ARM64/ARM64AddressTypePromotion.cpp b/lib/Target/ARM64/ARM64AddressTypePromotion.cpp
index 72fa6af367c..444bb9de69a 100644
--- a/lib/Target/ARM64/ARM64AddressTypePromotion.cpp
+++ b/lib/Target/ARM64/ARM64AddressTypePromotion.cpp
@@ -380,7 +380,7 @@ void ARM64AddressTypePromotion::mergeSExts(ValueToInsts &ValToSExtendedUses,
                                            SetOfInstructions &ToRemove) {
   DominatorTree &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
 
-  for (auto &Entry: ValToSExtendedUses) {
+  for (auto &Entry : ValToSExtendedUses) {
     Instructions &Insts = Entry.second;
     Instructions CurPts;
     for (Instruction *Inst : Insts) {
@@ -421,7 +421,7 @@ void ARM64AddressTypePromotion::analyzeSExtension(Instructions &SExtInsts) {
   DenseMap<Value *, Instruction *> SeenChains;
 
   for (auto &BB : *Func) {
-    for (auto &II: BB) {
+    for (auto &II : BB) {
       Instruction *SExt = &II;
 
       // Collect all sext operation per type.
diff --git a/lib/Target/ARM64/ARM64BranchRelaxation.cpp b/lib/Target/ARM64/ARM64BranchRelaxation.cpp
index a9bbef5a1ce..435b1fab5fa 100644
--- a/lib/Target/ARM64/ARM64BranchRelaxation.cpp
+++ b/lib/Target/ARM64/ARM64BranchRelaxation.cpp
@@ -120,7 +120,7 @@ void ARM64BranchRelaxation::verify() {
 
 /// print block size and offset information - debugging
 void ARM64BranchRelaxation::dumpBBs() {
-  for (auto &MBB: *MF) {
+  for (auto &MBB : *MF) {
     const BasicBlockInfo &BBI = BlockInfo[MBB.getNumber()];
     dbgs() << format("BB#%u\toffset=%08x\t", MBB.getNumber(), BBI.Offset)
            << format("size=%#x\n", BBI.Size);
diff --git a/lib/Target/ARM64/ARM64CollectLOH.cpp b/lib/Target/ARM64/ARM64CollectLOH.cpp
index f52778f2b2c..7da500b9b5c 100644
--- a/lib/Target/ARM64/ARM64CollectLOH.cpp
+++ b/lib/Target/ARM64/ARM64CollectLOH.cpp
@@ -650,7 +650,7 @@ static void computeADRP(const InstrToInstrs &UseToDefs,
                         ARM64FunctionInfo &ARM64FI,
                         const MachineDominatorTree *MDT) {
   DEBUG(dbgs() << "*** Compute LOH for ADRP\n");
-  for (const auto &Entry: UseToDefs) {
+  for (const auto &Entry : UseToDefs) {
     unsigned Size = Entry.second.size();
     if (Size == 0)
       continue;
@@ -923,7 +923,7 @@ static void computeOthers(const InstrToInstrs &UseToDefs,
         }
       }
       bool Found = false;
-      for (auto &Use: *Users) {
+      for (auto &Use : *Users) {
         if (!DefsOfPotentialCandidates.count(Use)) {
           ++NumTooCplxLvl1;
           Found = true;
diff --git a/lib/Target/ARM64/ARM64PromoteConstant.cpp b/lib/Target/ARM64/ARM64PromoteConstant.cpp
index 9fbaedb5a58..c19ade940cb 100644
--- a/lib/Target/ARM64/ARM64PromoteConstant.cpp
+++ b/lib/Target/ARM64/ARM64PromoteConstant.cpp
@@ -93,7 +93,7 @@ public:
   bool runOnModule(Module &M) {
     DEBUG(dbgs() << getPassName() << '\n');
     bool Changed = false;
-    for (auto &MF: M) {
+    for (auto &MF : M) {
       Changed |= runOnFunction(MF);
     }
     return Changed;
@@ -566,7 +566,7 @@ bool ARM64PromoteConstant::runOnFunction(Function &F) {
   SmallSet<Constant *, 8> AlreadyChecked;
 
   for (auto &MBB : F) {
-    for (auto &MI: MBB) {
+    for (auto &MI : MBB) {
       // Traverse the operand, looking for constant vectors
       // Replace them by a load of a global variable of type constant vector
       for (unsigned OpIdx = 0, EndOpIdx = MI.getNumOperands();
diff --git a/lib/Target/ARM64/ARM64StorePairSuppress.cpp b/lib/Target/ARM64/ARM64StorePairSuppress.cpp
index 6521d134221..fc6a0439c55 100644
--- a/lib/Target/ARM64/ARM64StorePairSuppress.cpp
+++ b/lib/Target/ARM64/ARM64StorePairSuppress.cpp
@@ -138,10 +138,10 @@ bool ARM64StorePairSuppress::runOnMachineFunction(MachineFunction &mf) {
   // precisely determine whether a store pair can be formed. But we do want to
   // filter out most situations where we can't form store pairs to avoid
   // computing trace metrics in those cases.
-  for (auto &MBB: *MF) {
+  for (auto &MBB : *MF) {
     bool SuppressSTP = false;
     unsigned PrevBaseReg = 0;
-    for (auto &MI: MBB) {
+    for (auto &MI : MBB) {
       if (!isNarrowFPStore(MI))
         continue;
       unsigned BaseReg;