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Fix some incorrectly named u10 / lu10 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173090 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -649,37 +649,24 @@ defm CLRSR_branch : FU6_LU6_np<0b0111101100, "clrsr">;
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// TODO ldwcpl, blacp
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let Defs = [R11], isReMaterializable = 1, neverHasSideEffects = 1 in
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def LDAP_u10 : _FU10<
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(outs),
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(ins i32imm:$addr),
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"ldap r11, $addr",
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[]>;
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def LDAPF_u10 : _FU10<(outs), (ins i32imm:$addr), "ldap r11, $addr", []>;
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let Defs = [R11], isReMaterializable = 1 in
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def LDAP_lu10 : _FLU10<
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(outs),
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(ins i32imm:$addr),
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"ldap r11, $addr",
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[(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
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def LDAPF_lu10 : _FLU10<(outs), (ins i32imm:$addr), "ldap r11, $addr",
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[(set R11, (pcrelwrapper tglobaladdr:$addr))]>;
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let Defs = [R11], isReMaterializable = 1 in
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def LDAP_lu10_ba : _FLU10<(outs),
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(ins i32imm:$addr),
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"ldap r11, $addr",
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[(set R11, (pcrelwrapper tblockaddress:$addr))]>;
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def LDAPF_lu10_ba : _FLU10<(outs), (ins i32imm:$addr), "ldap r11, $addr",
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[(set R11, (pcrelwrapper tblockaddress:$addr))]>;
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let isCall=1,
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// All calls clobber the link register and the non-callee-saved registers:
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Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in {
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def BL_u10 : _FU10<
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(outs), (ins calltarget:$target),
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"bl $target",
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[(XCoreBranchLink immU10:$target)]>;
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def BLRF_u10 : _FU10<(outs), (ins calltarget:$target), "bl $target",
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[(XCoreBranchLink immU10:$target)]>;
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def BL_lu10 : _FLU10<
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(outs), (ins calltarget:$target),
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"bl $target",
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[(XCoreBranchLink immU20:$target)]>;
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def BLRF_lu10 : _FLU10<(outs), (ins calltarget:$target), "bl $target",
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[(XCoreBranchLink immU20:$target)]>;
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}
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// Two operand short
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@ -979,8 +966,8 @@ def WAITEU_0R : _F0R<0b0000001100, (outs), (ins),
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// Non-Instruction Patterns
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//===----------------------------------------------------------------------===//
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def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BL_lu10 tglobaladdr:$addr)>;
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def : Pat<(XCoreBranchLink texternalsym:$addr), (BL_lu10 texternalsym:$addr)>;
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def : Pat<(XCoreBranchLink tglobaladdr:$addr), (BLRF_lu10 tglobaladdr:$addr)>;
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def : Pat<(XCoreBranchLink texternalsym:$addr), (BLRF_lu10 texternalsym:$addr)>;
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/// sext_inreg
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def : Pat<(sext_inreg GRRegs:$b, i1), (SEXT_rus GRRegs:$b, 1)>;
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