From 92ad363f58681df785933a75a9b9955f13885e7d Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Thu, 10 Sep 2009 22:09:31 +0000 Subject: [PATCH] Don't swap the operands of a subtraction when trying to create a post-decrement load/store. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81464 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- test/CodeGen/ARM/2009-09-10-postdec.ll | 11 +++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/ARM/2009-09-10-postdec.ll diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 58f931234e1..8236ca404df 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4715,7 +4715,7 @@ bool DAGCombiner::CombineToPostIndexedLoadStore(SDNode *N) { SDValue Offset; ISD::MemIndexedMode AM = ISD::UNINDEXED; if (TLI.getPostIndexedAddressParts(N, Op, BasePtr, Offset, AM, DAG)) { - if (Ptr == Offset) + if (Ptr == Offset && Op->getOpcode() == ISD::ADD) std::swap(BasePtr, Offset); if (Ptr != BasePtr) continue; diff --git a/test/CodeGen/ARM/2009-09-10-postdec.ll b/test/CodeGen/ARM/2009-09-10-postdec.ll new file mode 100644 index 00000000000..10653b51c14 --- /dev/null +++ b/test/CodeGen/ARM/2009-09-10-postdec.ll @@ -0,0 +1,11 @@ +; RUN: llc -march=arm < %s | FileCheck %s +; Radar 7213850 + +define i32 @test(i8* %d, i32 %x, i32 %y) nounwind { + %1 = ptrtoint i8* %d to i32 +;CHECK: sub + %2 = sub i32 %x, %1 + %3 = add nsw i32 %2, %y + store i8 0, i8* %d, align 1 + ret i32 %3 +}