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Move some of the decision logic for converting an instruction into one that sets

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the 'zero' bit down into the back-end. There are other cases where this logic
isn't sufficient, so they should be handled separately.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113665 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2010-09-10 23:34:19 +00:00
parent d10cd7b314
commit 92ad57f066
4 changed files with 24 additions and 18 deletions
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9
lib/CodeGen/PeepholeOptimizer.cpp
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@ -240,16 +240,11 @@ bool PeepholeOptimizer::OptimizeCmpInstr(MachineInstr *MI,
unsigned SrcReg;
int CmpValue;
if (!TII->AnalyzeCompare(MI, SrcReg, CmpValue) ||
TargetRegisterInfo::isPhysicalRegister(SrcReg) || CmpValue != 0)
return false;
MachineRegisterInfo::def_iterator DI = MRI->def_begin(SrcReg);
if (llvm::next(DI) != MRI->def_end())
// Only support one definition.
TargetRegisterInfo::isPhysicalRegister(SrcReg))
return false;
// Attempt to convert the defining instruction to set the "zero" flag.
if (TII->ConvertToSetZeroFlag(&*DI, MI, NextIter)) {
if (TII->ConvertToSetZeroFlag(MI, NextIter)) {
++NumEliminated;
return true;
}