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Fix X86's isLegalAddressingMode to recognize that static addresses
need not be RIP-relative in small mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111917 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -8171,6 +8171,7 @@ bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM,
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const Type *Ty) const {
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// X86 supports extremely general addressing modes.
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CodeModel::Model M = getTargetMachine().getCodeModel();
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Reloc::Model R = getTargetMachine().getRelocationModel();
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// X86 allows a sign-extended 32-bit immediate field as a displacement.
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if (!X86::isOffsetSuitableForCodeModel(AM.BaseOffs, M, AM.BaseGV != NULL))
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@ -8190,7 +8191,8 @@ bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM,
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return false;
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// If lower 4G is not available, then we must use rip-relative addressing.
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if (Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1))
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if ((M != CodeModel::Small || R != Reloc::Static) &&
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Subtarget->is64Bit() && (AM.BaseOffs || AM.Scale > 1))
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return false;
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}
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31
test/CodeGen/X86/lsr-static-addr.ll
Normal file
31
test/CodeGen/X86/lsr-static-addr.ll
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@ -0,0 +1,31 @@
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; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s
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; CHECK: xorl %eax, %eax
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; CHECK: movsd .LCPI0_0(%rip), %xmm0
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; CHECK: align
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; CHECK-NEXT: BB0_2:
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; CHECK-NEXT: movsd A(,%rax,8)
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; CHECK-NEXT: mulsd
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; CHECK-NEXT: movsd
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; CHECK-NEXT: incq %rax
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@A = external global [0 x double]
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define void @foo(i64 %n) nounwind {
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entry:
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%cmp5 = icmp sgt i64 %n, 0
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br i1 %cmp5, label %for.body, label %for.end
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for.body:
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%i.06 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr [0 x double]* @A, i64 0, i64 %i.06
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%tmp3 = load double* %arrayidx, align 8
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%mul = fmul double %tmp3, 2.300000e+00
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store double %mul, double* %arrayidx, align 8
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%inc = add nsw i64 %i.06, 1
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%exitcond = icmp eq i64 %inc, %n
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br i1 %exitcond, label %for.end, label %for.body
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for.end:
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ret void
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}
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