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Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5284 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -5,7 +5,7 @@
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//===----------------------------------------------------------------------===//
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#include "BBLiveVar.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Support/CFG.h"
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@ -5,14 +5,14 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "BBLiveVar.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/CFG.h"
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#include "Support/PostOrderIterator.h"
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#include "Support/SetOperations.h"
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#include "Support/CommandLine.h"
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#include "BBLiveVar.h"
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static RegisterAnalysis<FunctionLiveVarInfo>
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X("livevar", "Live Variable Analysis");
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@ -9,7 +9,7 @@
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/BasicBlock.h"
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#include "Support/CommandLine.h"
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@ -1524,7 +1524,7 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
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cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
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// expensive!
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SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
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SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
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SchedulingManager S(target, graph, schedPrio);
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ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph
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@ -11,7 +11,7 @@
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//===----------------------------------------------------------------------===//
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#include "SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Support/CFG.h"
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#include "Support/PostOrderIterator.h"
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@ -12,7 +12,7 @@
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionInfo.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetFrameInfo.h"
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@ -9,7 +9,7 @@
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineCodeForInstruction.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/BasicBlock.h"
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#include "Support/CommandLine.h"
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@ -1524,7 +1524,7 @@ bool InstructionSchedulingWithSSA::runOnFunction(Function &F)
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cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
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// expensive!
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SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
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SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
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SchedulingManager S(target, graph, schedPrio);
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ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph
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@ -11,7 +11,7 @@
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//===----------------------------------------------------------------------===//
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#include "SchedPriorities.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Support/CFG.h"
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#include "Support/PostOrderIterator.h"
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@ -5,7 +5,7 @@
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//===----------------------------------------------------------------------===//
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#include "BBLiveVar.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/Support/CFG.h"
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@ -5,14 +5,14 @@
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "BBLiveVar.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/Support/CFG.h"
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#include "Support/PostOrderIterator.h"
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#include "Support/SetOperations.h"
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#include "Support/CommandLine.h"
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#include "BBLiveVar.h"
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static RegisterAnalysis<FunctionLiveVarInfo>
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X("livevar", "Live Variable Analysis");
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@ -12,7 +12,7 @@
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionInfo.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h"
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#include "llvm/Analysis/LoopInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetFrameInfo.h"
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@ -15,15 +15,18 @@
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineInstrAnnot.h"
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#include "llvm/CodeGen/RegAllocCommon.h"
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#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
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#include "llvm/CodeGen/FunctionLiveVarInfo.h" // FIXME: Remove
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#include "llvm/iTerminators.h"
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#include "llvm/iOther.h"
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#include "llvm/Function.h"
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#include "llvm/DerivedTypes.h"
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#include <values.h>
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using std::cerr;
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using std::vector;
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enum {
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BadRegClass = ~0
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};
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UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc &tgt)
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: TargetRegInfo(tgt), NumOfIntArgRegs(6),
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NumOfFloatArgRegs(32), InvalidRegNum(1000) {
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@ -390,7 +393,7 @@ void UltraSparcRegInfo::suggestRegs4MethodArgs(const Function *Meth,
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assert(LR && "No live range found for method arg");
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unsigned regType = getRegType(LR);
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unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
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unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
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int regNum = (regType == IntRegType)
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? regNumForIntArg(/*inCallee*/ true, isVarArgs,
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@ -434,7 +437,7 @@ void UltraSparcRegInfo::colorMethodArgs(const Function *Meth,
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//
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bool isArgInReg = false;
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unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
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unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
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unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
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int regNum = (regType == IntRegType)
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? regNumForIntArg(/*inCallee*/ true, isVarArgs,
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@ -605,7 +608,7 @@ void UltraSparcRegInfo::suggestRegs4CallArgs(MachineInstr *CallMI,
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"all args (even consts) must be defined before");
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unsigned regType = getRegType( LR );
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unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
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unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
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// Choose a register for this arg depending on whether it is
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// an INT or FP value. Here we ignore whether or not it is a
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@ -657,7 +660,7 @@ UltraSparcRegInfo::InitializeOutgoingArg(MachineInstr* CallMI,
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{
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MachineInstr *AdMI;
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bool isArgInReg = false;
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unsigned UniArgReg = MAXINT; // unused unless initialized below
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unsigned UniArgReg = BadRegClass; // unused unless initialized below
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if (UniArgRegOrNone != InvalidRegNum)
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{
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isArgInReg = true;
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@ -847,7 +850,7 @@ void UltraSparcRegInfo::colorCallArgs(MachineInstr *CallMI,
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//
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bool isArgInReg = false;
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unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
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unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
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unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
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// Find the register that must be used for this arg, depending on
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// whether it is an INT or FP value. Here we ignore whether or not it
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