From 92c1e126473dfa93eeb4c9a124af4fedb40f0d5b Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Fri, 13 Feb 2009 02:16:35 +0000 Subject: [PATCH] Revert this. It was breaking stuff. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64428 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/FastISel.cpp | 51 ++++++++++++++++--- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 33 +++++++++++- .../SelectionDAG/SelectionDAGBuild.cpp | 36 +++++++++---- lib/CodeGen/VirtRegMap.cpp | 2 +- lib/Target/X86/X86RegisterInfo.cpp | 10 +++- 5 files changed, 113 insertions(+), 19 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index 3705f4556f8..fb3d101f122 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -323,21 +323,32 @@ bool FastISel::SelectCall(User *I) { CU.getFilename()); unsigned Line = SPI->getLine(); unsigned Col = SPI->getColumn(); + unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile); unsigned Idx = MF.getOrCreateDebugLocID(SrcFile, Line, Col); setCurDebugLoc(DebugLoc::get(Idx)); + const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); + BuildMI(MBB, DL, II).addImm(ID); } return true; } case Intrinsic::dbg_region_start: { DbgRegionStartInst *RSI = cast(I); - if (DW && DW->ValidDebugInfo(RSI->getContext())) - DW->RecordRegionStart(cast(RSI->getContext())); + if (DW && DW->ValidDebugInfo(RSI->getContext())) { + unsigned ID = + DW->RecordRegionStart(cast(RSI->getContext())); + const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); + BuildMI(MBB, DL, II).addImm(ID); + } return true; } case Intrinsic::dbg_region_end: { DbgRegionEndInst *REI = cast(I); - if (DW && DW->ValidDebugInfo(REI->getContext())) - DW->RecordRegionEnd(cast(REI->getContext())); + if (DW && DW->ValidDebugInfo(REI->getContext())) { + unsigned ID = + DW->RecordRegionEnd(cast(REI->getContext())); + const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); + BuildMI(MBB, DL, II).addImm(ID); + } return true; } case Intrinsic::dbg_func_start: { @@ -357,14 +368,42 @@ bool FastISel::SelectCall(User *I) { // function start. It will be emitted at asm emission time. However, // create a label if this is a beginning of inlined function. unsigned Line = Subprogram.getLineNumber(); + unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile); setCurDebugLoc(DebugLoc::get(MF.getOrCreateDebugLocID(SrcFile, Line, 0))); + + if (DW->getRecordSourceLineCount() != 1) { + const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL); + BuildMI(MBB, DL, II).addImm(LabelID); + } } return true; } - case Intrinsic::dbg_declare: - // FIXME: Do something correct here when declare stuff is working again. + case Intrinsic::dbg_declare: { + DbgDeclareInst *DI = cast(I); + Value *Variable = DI->getVariable(); + if (DW && DW->ValidDebugInfo(Variable)) { + // Determine the address of the declared object. + Value *Address = DI->getAddress(); + if (BitCastInst *BCI = dyn_cast(Address)) + Address = BCI->getOperand(0); + AllocaInst *AI = dyn_cast(Address); + // Don't handle byval struct arguments or VLAs, for example. + if (!AI) break; + DenseMap::iterator SI = + StaticAllocaMap.find(AI); + if (SI == StaticAllocaMap.end()) break; // VLAs. + int FI = SI->second; + + // Determine the debug globalvariable. + GlobalValue *GV = cast(Variable); + + // Build the DECLARE instruction. + const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE); + BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV); + } return true; + } case Intrinsic::eh_exception: { MVT VT = TLI.getValueType(I->getType()); switch (TLI.getOperationAction(ISD::EXCEPTIONADDR, VT)) { diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 8cba55fdb0f..e5a30c88be1 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1274,9 +1274,38 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { switch (TLI.getOperationAction(ISD::DBG_STOPPOINT, MVT::Other)) { case TargetLowering::Promote: default: assert(0 && "This action is not supported yet!"); - case TargetLowering::Expand: - Result = Tmp1; // chain + case TargetLowering::Expand: { + DwarfWriter *DW = DAG.getDwarfWriter(); + bool useDEBUG_LOC = TLI.isOperationLegalOrCustom(ISD::DEBUG_LOC, + MVT::Other); + bool useLABEL = TLI.isOperationLegalOrCustom(ISD::DBG_LABEL, MVT::Other); + + const DbgStopPointSDNode *DSP = cast(Node); + GlobalVariable *CU_GV = cast(DSP->getCompileUnit()); + if (DW && (useDEBUG_LOC || useLABEL) && !CU_GV->isDeclaration()) { + DICompileUnit CU(cast(DSP->getCompileUnit())); + unsigned SrcFile = DW->RecordSource(CU.getDirectory(), + CU.getFilename()); + + unsigned Line = DSP->getLine(); + unsigned Col = DSP->getColumn(); + + // A bit self-referential to have DebugLoc on Debug_Loc nodes, but + // it won't hurt anything. + if (useDEBUG_LOC) { + SDValue Ops[] = { Tmp1, DAG.getConstant(Line, MVT::i32), + DAG.getConstant(Col, MVT::i32), + DAG.getConstant(SrcFile, MVT::i32) }; + Result = DAG.getNode(ISD::DEBUG_LOC, dl, MVT::Other, Ops, 4); + } else { + unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile); + Result = DAG.getLabel(ISD::DBG_LABEL, dl, Tmp1, ID); + } + } else { + Result = Tmp1; // chain + } break; + } case TargetLowering::Legal: { LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType()); if (Action == Legal && Tmp1 == Node->getOperand(0)) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp index 0918e6c3ad5..47335d3f9a2 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp @@ -3912,18 +3912,24 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { case Intrinsic::dbg_region_start: { DwarfWriter *DW = DAG.getDwarfWriter(); DbgRegionStartInst &RSI = cast(I); - - if (DW && DW->ValidDebugInfo(RSI.getContext())) - DW->RecordRegionStart(cast(RSI.getContext())); + if (DW && DW->ValidDebugInfo(RSI.getContext())) { + unsigned LabelID = + DW->RecordRegionStart(cast(RSI.getContext())); + DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(), + getRoot(), LabelID)); + } return 0; } case Intrinsic::dbg_region_end: { DwarfWriter *DW = DAG.getDwarfWriter(); DbgRegionEndInst &REI = cast(I); - - if (DW && DW->ValidDebugInfo(REI.getContext())) - DW->RecordRegionEnd(cast(REI.getContext())); + if (DW && DW->ValidDebugInfo(REI.getContext())) { + unsigned LabelID = + DW->RecordRegionEnd(cast(REI.getContext())); + DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(), + getRoot(), LabelID)); + } return 0; } @@ -3944,15 +3950,27 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) { // function start. It will be emitted at asm emission time. However, // create a label if this is a beginning of inlined function. unsigned Line = Subprogram.getLineNumber(); + unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile); + + if (DW->getRecordSourceLineCount() != 1) + DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(), + getRoot(), LabelID)); + setCurDebugLoc(DebugLoc::get(DAG.getMachineFunction(). - getOrCreateDebugLocID(SrcFile, Line, 0))); + getOrCreateDebugLocID(SrcFile, Line, 0))); } return 0; } - case Intrinsic::dbg_declare: - // FIXME: Do something correct here when declare stuff is working again. + case Intrinsic::dbg_declare: { + DwarfWriter *DW = DAG.getDwarfWriter(); + DbgDeclareInst &DI = cast(I); + Value *Variable = DI.getVariable(); + if (DW && DW->ValidDebugInfo(Variable)) + DAG.setRoot(DAG.getNode(ISD::DECLARE, dl, MVT::Other, getRoot(), + getValue(DI.getAddress()), getValue(Variable))); return 0; + } case Intrinsic::eh_exception: { if (!CurMBB->isLandingPad()) { diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index f758cc62cf4..f288dcc87cf 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -1278,7 +1278,7 @@ void LocalSpiller::TransferDeadness(MachineBasicBlock *MBB, unsigned CurDist, } /// rewriteMBB - Keep track of which spills are available even after the -/// register allocator is done with them. If possible, avoid reloading vregs. +/// register allocator is done with them. If possible, avid reloading vregs. void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, AvailableSpills &Spills) { DOUT << "\n**** Local spiller rewriting MBB '" diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 80a4f46095a..0130ba2c49d 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -785,6 +785,12 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const { BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r)) .addReg(FramePtr, /*isDef=*/false, /*isImp=*/false, /*isKill=*/true); + if (needsFrameMoves) { + // Mark effective beginning of when frame pointer becomes valid. + FrameLabelId = MMI->NextLabelID(); + BuildMI(MBB, MBBI, DL, TII.get(X86::DBG_LABEL)).addImm(FrameLabelId); + } + // Update EBP with the new base value... BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr) @@ -808,9 +814,11 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const { NumBytes = StackSize - X86FI->getCalleeSavedFrameSize(); unsigned ReadyLabelId = 0; - if (needsFrameMoves) + if (needsFrameMoves) { // Mark effective beginning of when frame pointer is ready. ReadyLabelId = MMI->NextLabelID(); + BuildMI(MBB, MBBI, DL, TII.get(X86::DBG_LABEL)).addImm(ReadyLabelId); + } // Skip the callee-saved push instructions. while (MBBI != MBB.end() &&