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Remove isReg, isImm, and isMBB, and change all their users to use

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isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41958 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2007-09-14 20:33:02 +00:00
parent 693f541526
commit 92dfe2001e
17 changed files with 57 additions and 61 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
lib/Target/X86/X86RegisterInfo.cpp
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@@ -291,9 +291,9 @@ void X86RegisterInfo::reMaterialize(MachineBasicBlock &MBB,
static const MachineInstrBuilder &FuseInstrAddOperand(MachineInstrBuilder &MIB,
MachineOperand &MO) {
if (MO.isReg())
if (MO.isRegister())
MIB = MIB.addReg(MO.getReg(), MO.isDef(), MO.isImplicit());
else if (MO.isImm())
else if (MO.isImmediate())
MIB = MIB.addImm(MO.getImm());
else if (MO.isFrameIndex())
MIB = MIB.addFrameIndex(MO.getFrameIndex());
@@ -340,7 +340,7 @@ static MachineInstr *FuseInst(unsigned Opcode, unsigned OpNo,
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (i == OpNo) {
assert(MO.isReg() && "Expected to fold into reg operand!");
assert(MO.isRegister() && "Expected to fold into reg operand!");
unsigned NumAddrOps = MOs.size();
for (unsigned i = 0; i != NumAddrOps; ++i)
MIB = FuseInstrAddOperand(MIB, MOs[i]);
@@ -440,8 +440,8 @@ X86RegisterInfo::foldMemoryOperand(MachineInstr *MI, unsigned i,
// instruction is different than folding it other places. It requires
// replacing the *two* registers with the memory location.
if (isTwoAddr && NumOps >= 2 && i < 2 &&
MI->getOperand(0).isReg() &&
MI->getOperand(1).isReg() &&
MI->getOperand(0).isRegister() &&
MI->getOperand(1).isRegister() &&
MI->getOperand(0).getReg() == MI->getOperand(1).getReg()) {
static const TableEntry OpcodeTable[] = {
{ X86::ADC32ri, X86::ADC32mi },
@@ -1528,7 +1528,7 @@ void X86RegisterInfo::emitEpilogue(MachineFunction &MF,
if (RetOpcode == X86::EH_RETURN) {
MBBI = prior(MBB.end());
MachineOperand &DestAddr = MBBI->getOperand(0);
assert(DestAddr.isReg() && "Offset should be in register!");
assert(DestAddr.isRegister() && "Offset should be in register!");
BuildMI(MBB, MBBI, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),StackPtr).
addReg(DestAddr.getReg());
}