Merge information about the number of zero, one, and sign bits of live-out registers

at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126170 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Cameron Zwarich
2011-02-22 00:46:27 +00:00
parent 63a8dae64d
commit 92efda7e91
5 changed files with 107 additions and 9 deletions

View File

@@ -101,14 +101,30 @@ public:
#endif
struct LiveOutInfo {
unsigned NumSignBits;
unsigned NumSignBits : 31;
bool IsValid : 1;
APInt KnownOne, KnownZero;
LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {}
LiveOutInfo() : NumSignBits(0), IsValid(false), KnownOne(1, 0),
KnownZero(1, 0) {}
};
/// LiveOutRegInfo - Information about live out vregs.
IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
/// VisitedBBs - Basic blocks that have been visited by reverse postorder.
DenseSet<const BasicBlock*> VisitedBBs;
/// AllPredsVisited - Tracks whether all predecessors of the current basic
/// block have already been visited.
bool AllPredsVisited;
/// PHIDestRegs - Virtual registers that are the destinations of PHIs.
DenseSet<unsigned> PHIDestRegs;
/// PHISrcToDestMap - Maps the virtual register defining a PHI's source to the
/// virtual register defining its destination.
DenseMap<unsigned, unsigned> PHISrcToDestMap;
/// PHINodesToUpdate - A list of phi instructions whose operand list will
/// be updated after processing the current basic block.
/// TODO: This isn't per-function state, it's per-basic-block state. But