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Add source debug information to the Sparc code generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81215 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -104,6 +104,8 @@ bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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O << "\t.type\t" << CurrentFnName << ", #function\n";
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O << CurrentFnName << ":\n";
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// Emit pre-function debug information.
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DW->BeginFunction(&MF);
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// Number each basic block so that we can consistently refer to them
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// in PC-relative references.
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@ -130,6 +132,9 @@ bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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}
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}
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// Emit post-function debug information.
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DW->EndFunction(&MF);
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// We didn't modify anything.
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return false;
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}
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@ -22,6 +22,9 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Target &T, const StringRef &TT) {
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ZeroDirective = "\t.skip\t";
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CommentString = "!";
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COMMDirectiveTakesAlignment = true;
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HasLEB128 = true;
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AbsoluteDebugSectionOffsets = true;
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SupportsDebugInformation = true;
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SunStyleELFSectionSwitchSyntax = true;
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UsesELFSectionDirectiveForBSS = true;
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@ -169,13 +169,11 @@ void SparcRegisterInfo::emitEpilogue(MachineFunction &MF,
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}
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unsigned SparcRegisterInfo::getRARegister() const {
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llvm_unreachable("What is the return address register");
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return 0;
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return SP::I7;
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}
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unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const {
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llvm_unreachable("What is the frame register");
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return SP::G1;
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return SP::I6;
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}
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unsigned SparcRegisterInfo::getEHExceptionRegister() const {
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@ -189,8 +187,7 @@ unsigned SparcRegisterInfo::getEHHandlerRegister() const {
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}
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int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
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llvm_unreachable("What is the dwarf register number");
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return -1;
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return SparcGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
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}
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#include "SparcGenRegisterInfo.inc"
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