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Add source debug information to the Sparc code generator.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81215 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Pennington 2009-09-08 12:47:30 +00:00
parent 22f35ace45
commit 930e4d96e8
3 changed files with 11 additions and 6 deletions
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5
lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp
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@ -104,6 +104,8 @@ bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
O << "\t.type\t" << CurrentFnName << ", #function\n"; O << "\t.type\t" << CurrentFnName << ", #function\n";
O << CurrentFnName << ":\n"; O << CurrentFnName << ":\n";
// Emit pre-function debug information.
DW->BeginFunction(&MF);
// Number each basic block so that we can consistently refer to them // Number each basic block so that we can consistently refer to them
// in PC-relative references. // in PC-relative references.
@ -130,6 +132,9 @@ bool SparcAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
} }
} }
// Emit post-function debug information.
DW->EndFunction(&MF);
// We didn't modify anything. // We didn't modify anything.
return false; return false;
} }

3
lib/Target/Sparc/SparcMCAsmInfo.cpp
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@ -22,6 +22,9 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Target &T, const StringRef &TT) {
ZeroDirective = "\t.skip\t"; ZeroDirective = "\t.skip\t";
CommentString = "!"; CommentString = "!";
COMMDirectiveTakesAlignment = true; COMMDirectiveTakesAlignment = true;
HasLEB128 = true;
AbsoluteDebugSectionOffsets = true;
SupportsDebugInformation = true;
SunStyleELFSectionSwitchSyntax = true; SunStyleELFSectionSwitchSyntax = true;
UsesELFSectionDirectiveForBSS = true; UsesELFSectionDirectiveForBSS = true;

9
lib/Target/Sparc/SparcRegisterInfo.cpp
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@ -169,13 +169,11 @@ void SparcRegisterInfo::emitEpilogue(MachineFunction &MF,
} }
unsigned SparcRegisterInfo::getRARegister() const { unsigned SparcRegisterInfo::getRARegister() const {
llvm_unreachable("What is the return address register"); return SP::I7;
return 0;
} }
unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const { unsigned SparcRegisterInfo::getFrameRegister(MachineFunction &MF) const {
llvm_unreachable("What is the frame register"); return SP::I6;
return SP::G1;
} }
unsigned SparcRegisterInfo::getEHExceptionRegister() const { unsigned SparcRegisterInfo::getEHExceptionRegister() const {
@ -189,8 +187,7 @@ unsigned SparcRegisterInfo::getEHHandlerRegister() const {
} }
int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { int SparcRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
llvm_unreachable("What is the dwarf register number"); return SparcGenRegisterInfo::getDwarfRegNumFull(RegNum, 0);
return -1;
} }
#include "SparcGenRegisterInfo.inc" #include "SparcGenRegisterInfo.inc"