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ARM: Use range-based for loops in frame lowering.

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No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205602 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2014-04-04 02:10:55 +00:00
parent 3b2b5dfa9b
commit 93203457fc
1 changed files with 19 additions and 25 deletions
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44
lib/Target/ARM/ARMFrameLowering.cpp
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@ -316,10 +316,9 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
MachineBasicBlock::iterator Pos = ++GPRCS1Push; MachineBasicBlock::iterator Pos = ++GPRCS1Push;
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex); .addCFIIndex(CFIIndex);
for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), for (const auto &Entry : CSI) {
E = CSI.end(); I != E; ++I) { unsigned Reg = Entry.getReg();
unsigned Reg = I->getReg(); int FI = Entry.getFrameIdx();
int FI = I->getFrameIdx();
switch (Reg) { switch (Reg) {
case ARM::R8: case ARM::R8:
case ARM::R9: case ARM::R9:
@ -382,10 +381,9 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)) BuildMI(MBB, Pos, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
.addCFIIndex(CFIIndex); .addCFIIndex(CFIIndex);
} }
for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), for (const auto &Entry : CSI) {
E = CSI.end(); I != E; ++I) { unsigned Reg = Entry.getReg();
unsigned Reg = I->getReg(); int FI = Entry.getFrameIdx();
int FI = I->getFrameIdx();
switch (Reg) { switch (Reg) {
case ARM::R8: case ARM::R8:
case ARM::R9: case ARM::R9:
@ -419,10 +417,9 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
} }
} while (DPRCSPush->getOpcode() == ARM::VSTMDDB_UPD); } while (DPRCSPush->getOpcode() == ARM::VSTMDDB_UPD);
for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(), for (const auto &Entry : CSI) {
E = CSI.end(); I != E; ++I) { unsigned Reg = Entry.getReg();
unsigned Reg = I->getReg(); int FI = Entry.getFrameIdx();
int FI = I->getFrameIdx();
if ((Reg >= ARM::D0 && Reg <= ARM::D31) && if ((Reg >= ARM::D0 && Reg <= ARM::D31) &&
(Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) { (Reg < ARM::D8 || Reg >= ARM::D8 + AFI->getNumAlignedDPRCS2Regs())) {
unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true); unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
@ -1205,12 +1202,9 @@ bool ARMFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
static unsigned GetFunctionSizeInBytes(const MachineFunction &MF, static unsigned GetFunctionSizeInBytes(const MachineFunction &MF,
const ARMBaseInstrInfo &TII) { const ARMBaseInstrInfo &TII) {
unsigned FnSize = 0; unsigned FnSize = 0;
for (MachineFunction::const_iterator MBBI = MF.begin(), E = MF.end(); for (auto &MBB : MF) {
MBBI != E; ++MBBI) { for (auto &MI : MBB)
const MachineBasicBlock &MBB = *MBBI; FnSize += TII.GetInstSizeInBytes(&MI);
for (MachineBasicBlock::const_iterator I = MBB.begin(),E = MBB.end();
I != E; ++I)
FnSize += TII.GetInstSizeInBytes(I);
} }
return FnSize; return FnSize;
} }
@ -1223,21 +1217,21 @@ static unsigned estimateRSStackSizeLimit(MachineFunction &MF,
const TargetFrameLowering *TFI) { const TargetFrameLowering *TFI) {
const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
unsigned Limit = (1 << 12) - 1; unsigned Limit = (1 << 12) - 1;
for (MachineFunction::iterator BB = MF.begin(),E = MF.end(); BB != E; ++BB) { for (auto &MBB : MF) {
for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); for (auto &MI : MBB) {
I != E; ++I) { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) { if (!MI.getOperand(i).isFI())
if (!I->getOperand(i).isFI()) continue; continue;
// When using ADDri to get the address of a stack object, 255 is the // When using ADDri to get the address of a stack object, 255 is the
// largest offset guaranteed to fit in the immediate offset. // largest offset guaranteed to fit in the immediate offset.
if (I->getOpcode() == ARM::ADDri) { if (MI.getOpcode() == ARM::ADDri) {
Limit = std::min(Limit, (1U << 8) - 1); Limit = std::min(Limit, (1U << 8) - 1);
break; break;
} }
// Otherwise check the addressing mode. // Otherwise check the addressing mode.
switch (I->getDesc().TSFlags & ARMII::AddrModeMask) { switch (MI.getDesc().TSFlags & ARMII::AddrModeMask) {
case ARMII::AddrMode3: case ARMII::AddrMode3:
case ARMII::AddrModeT2_i8: case ARMII::AddrModeT2_i8:
Limit = std::min(Limit, (1U << 8) - 1); Limit = std::min(Limit, (1U << 8) - 1);