mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-06-15 21:24:00 +00:00
Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
@ -51,7 +51,11 @@ static void ContractNodes(OwningPtr<Matcher> &MatcherPtr,
|
||||
if (MC->getChildNo() < 8 && // Only have CheckChildType0...7
|
||||
CT->getResNo() == 0) // CheckChildType checks res #0
|
||||
New = new CheckChildTypeMatcher(MC->getChildNo(), CT->getType());
|
||||
|
||||
|
||||
if (CheckSameMatcher *CS = dyn_cast<CheckSameMatcher>(MC->getNext()))
|
||||
if (MC->getChildNo() < 4) // Only have CheckChildSame0...3
|
||||
New = new CheckChildSameMatcher(MC->getChildNo(), CS->getMatchNumber());
|
||||
|
||||
if (New) {
|
||||
// Insert the new node.
|
||||
New->setNext(MatcherPtr.take());
|
||||
|
Reference in New Issue
Block a user