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Allow a GR64 to be moved into an MMX register via the "movd" instruction.

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Still need to have JIT generate this code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37863 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2007-07-04 00:19:54 +00:00
parent 5653322e72
commit 93888428d4
3 changed files with 33 additions and 1 deletions
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13
lib/Target/X86/X86InstrMMX.td
View File

@ -183,6 +183,9 @@ def MMX_MOVD64rm : MMXI<0x6E, MRMSrcMem, (ops VR64:$dst, i32mem:$src),
def MMX_MOVD64mr : MMXI<0x7E, MRMDestMem, (ops i32mem:$dst, VR64:$src),
"movd {$src, $dst|$dst, $src}", []>;
def MMX_MOVD64to64rr : MMXI<0x6E, MRMSrcReg, (ops VR64:$dst, GR64:$src),
"movd {$src, $dst|$dst, $src}", []>;
def MMX_MOVQ64rr : MMXI<0x6F, MRMSrcReg, (ops VR64:$dst, VR64:$src),
"movq {$src, $dst|$dst, $src}", []>;
def MMX_MOVQ64rm : MMXI<0x6F, MRMSrcMem, (ops VR64:$dst, i64mem:$src),
@ -552,6 +555,16 @@ def : Pat<(v1i64 (bitconvert (v2i32 VR64:$src))), (v1i64 VR64:$src)>;
def : Pat<(v1i64 (bitconvert (v4i16 VR64:$src))), (v1i64 VR64:$src)>;
def : Pat<(v1i64 (bitconvert (v8i8 VR64:$src))), (v1i64 VR64:$src)>;
// 64-bit bit convert.
def : Pat<(v1i64 (bitconvert (i64 GR64:$src))),
(MMX_MOVD64to64rr GR64:$src)>;
def : Pat<(v2i32 (bitconvert (i64 GR64:$src))),
(MMX_MOVD64to64rr GR64:$src)>;
def : Pat<(v4i16 (bitconvert (i64 GR64:$src))),
(MMX_MOVD64to64rr GR64:$src)>;
def : Pat<(v8i8 (bitconvert (i64 GR64:$src))),
(MMX_MOVD64to64rr GR64:$src)>;
def MMX_X86s2vec : SDNode<"X86ISD::S2VEC", SDTypeProfile<1, 1, []>, []>;
// Move scalar to XMM zero-extended

1
test/CodeGen/X86/2007-06-15-IntToMMX.ll
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@ -1,5 +1,4 @@
; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep paddusw
; XFAIL: *
@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
define void @foo(<1 x i64> %A, <1 x i64> %B) {

20
test/CodeGen/X86/2007-07-03-GR64ToVR64.ll Normal file
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@ -0,0 +1,20 @@
; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rsi, %mm0} &&
; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {movd %rdi, %mm1} &&
; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx | grep {paddusw %mm0, %mm1}
@R = external global <1 x i64> ; <<1 x i64>*> [#uses=1]
define void @foo(<1 x i64> %A, <1 x i64> %B) {
entry:
%tmp4 = bitcast <1 x i64> %B to <4 x i16> ; <<4 x i16>> [#uses=1]
%tmp6 = bitcast <1 x i64> %A to <4 x i16> ; <<4 x i16>> [#uses=1]
%tmp7 = tail call <4 x i16> @llvm.x86.mmx.paddus.w( <4 x i16> %tmp6, <4 x i16> %tmp4 ) ; <<4 x i16>> [#uses=1]
%tmp8 = bitcast <4 x i16> %tmp7 to <1 x i64> ; <<1 x i64>> [#uses=1]
store <1 x i64> %tmp8, <1 x i64>* @R
tail call void @llvm.x86.mmx.emms( )
ret void
}
declare <4 x i16> @llvm.x86.mmx.paddus.w(<4 x i16>, <4 x i16>)
declare void @llvm.x86.mmx.emms()