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Add a new -enable-cygwin-compatible-output argument, which make the output more
consumably by the cygwin assembler. This is really just a nasty hack until we get real target triple support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7742 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -23,7 +23,7 @@ X86GenInstrInfo.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
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$(TBLGEN) $< -gen-instr-desc -o $@
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X86GenInstrSelector.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
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$(TBLGEN) $< -gen-instr-selector -o $@
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$(TBLGEN) $< -debug -gen-instr-selector -o $@
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clean::
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$(VERB) rm -f *.inc
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@ -3,7 +3,7 @@
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// This file contains a printer that converts from our internal
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// representation of machine-dependent LLVM code to Intel-format
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// assembly language. This printer is the output mechanism used
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// by `llc' and `lli -printmachineinstrs' on X86.
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// by `llc' and `lli -print-machineinstrs' on X86.
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//
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//===----------------------------------------------------------------------===//
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@ -20,8 +20,14 @@
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Support/Mangler.h"
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#include "Support/StringExtras.h"
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#include "Support/CommandLine.h"
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namespace {
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// FIXME: This should be automatically picked up by autoconf from the C
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// frontend
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cl::opt<bool> EmitCygwin("enable-cygwin-compatible-output", cl::Hidden,
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cl::desc("Emit X86 assembly code suitable for consumption by cygwin"));
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struct Printer : public MachineFunctionPass {
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/// Output stream on which we're printing assembly code.
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///
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@ -399,7 +405,8 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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O << "\t.text\n";
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O << "\t.align 16\n";
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O << "\t.globl\t" << CurrentFnName << "\n";
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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if (!EmitCygwin)
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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O << CurrentFnName << ":\n";
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// Number each basic block so that we can consistently refer to them
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@ -455,10 +462,11 @@ void Printer::printOp(const MachineOperand &MO,
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}
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
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if (MO.getReg() < MRegisterInfo::FirstVirtualRegister) {
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << "%" << RI.get(MO.getReg()).Name;
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else
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if (!EmitCygwin) O << "%";
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O << RI.get(MO.getReg()).Name;
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} else
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O << "%reg" << MO.getReg();
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return;
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@ -559,7 +567,7 @@ void Printer::checkImplUses (const TargetInstrDescriptor &Desc) {
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if (Desc.TSFlags & X86II::PrintImplUses) {
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for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << ", %" << RI.get(*p).Name;
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O << ", " << (EmitCygwin ? "" : "%") << RI.get(*p).Name;
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}
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}
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}
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@ -903,20 +911,22 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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}
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}
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bool Printer::doInitialization(Module &M)
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{
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// Tell gas we are outputting Intel syntax (not AT&T syntax)
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// assembly.
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bool Printer::doInitialization(Module &M) {
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// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
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//
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// Bug: gas in `intel_syntax noprefix' mode interprets the symbol
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// `Sp' in an instruction as a reference to the register named sp,
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// and if you try to reference a symbol `Sp' (e.g. `mov ECX, OFFSET
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// Sp') then it gets lowercased before being looked up in the symbol
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// table. This creates spurious `undefined symbol' errors when
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// linking. Workaround: Do not use `noprefix' mode, and decorate all
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// register names with percent signs.
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O << "\t.intel_syntax\n";
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Mang = new Mangler(M);
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// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
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// instruction as a reference to the register named sp, and if you try to
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// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
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// before being looked up in the symbol table. This creates spurious
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// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
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// mode, and decorate all register names with percent signs.
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//
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// Cygwin presumably doesn't have this problem, so drop the %'s.
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//
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O << "\t.intel_syntax";
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if (EmitCygwin) O << " noprefix";
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O << "\n";
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Mang = new Mangler(M, EmitCygwin);
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return false; // success
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}
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@ -3,7 +3,7 @@
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// This file contains a printer that converts from our internal
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// representation of machine-dependent LLVM code to Intel-format
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// assembly language. This printer is the output mechanism used
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// by `llc' and `lli -printmachineinstrs' on X86.
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// by `llc' and `lli -print-machineinstrs' on X86.
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//
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//===----------------------------------------------------------------------===//
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@ -20,8 +20,14 @@
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#include "llvm/Assembly/Writer.h"
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#include "llvm/Support/Mangler.h"
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#include "Support/StringExtras.h"
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#include "Support/CommandLine.h"
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namespace {
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// FIXME: This should be automatically picked up by autoconf from the C
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// frontend
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cl::opt<bool> EmitCygwin("enable-cygwin-compatible-output", cl::Hidden,
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cl::desc("Emit X86 assembly code suitable for consumption by cygwin"));
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struct Printer : public MachineFunctionPass {
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/// Output stream on which we're printing assembly code.
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///
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@ -399,7 +405,8 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
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O << "\t.text\n";
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O << "\t.align 16\n";
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O << "\t.globl\t" << CurrentFnName << "\n";
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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if (!EmitCygwin)
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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O << CurrentFnName << ":\n";
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// Number each basic block so that we can consistently refer to them
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@ -455,10 +462,11 @@ void Printer::printOp(const MachineOperand &MO,
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}
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// FALLTHROUGH
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case MachineOperand::MO_MachineRegister:
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if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
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if (MO.getReg() < MRegisterInfo::FirstVirtualRegister) {
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << "%" << RI.get(MO.getReg()).Name;
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else
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if (!EmitCygwin) O << "%";
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O << RI.get(MO.getReg()).Name;
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} else
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O << "%reg" << MO.getReg();
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return;
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@ -559,7 +567,7 @@ void Printer::checkImplUses (const TargetInstrDescriptor &Desc) {
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if (Desc.TSFlags & X86II::PrintImplUses) {
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for (const unsigned *p = Desc.ImplicitUses; *p; ++p) {
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// Bug Workaround: See note in Printer::doInitialization about %.
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O << ", %" << RI.get(*p).Name;
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O << ", " << (EmitCygwin ? "" : "%") << RI.get(*p).Name;
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}
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}
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}
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@ -903,20 +911,22 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
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}
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}
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bool Printer::doInitialization(Module &M)
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{
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// Tell gas we are outputting Intel syntax (not AT&T syntax)
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// assembly.
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bool Printer::doInitialization(Module &M) {
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// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
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//
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// Bug: gas in `intel_syntax noprefix' mode interprets the symbol
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// `Sp' in an instruction as a reference to the register named sp,
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// and if you try to reference a symbol `Sp' (e.g. `mov ECX, OFFSET
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// Sp') then it gets lowercased before being looked up in the symbol
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// table. This creates spurious `undefined symbol' errors when
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// linking. Workaround: Do not use `noprefix' mode, and decorate all
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// register names with percent signs.
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O << "\t.intel_syntax\n";
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Mang = new Mangler(M);
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// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
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// instruction as a reference to the register named sp, and if you try to
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// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
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// before being looked up in the symbol table. This creates spurious
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// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
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// mode, and decorate all register names with percent signs.
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//
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// Cygwin presumably doesn't have this problem, so drop the %'s.
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//
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O << "\t.intel_syntax";
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if (EmitCygwin) O << " noprefix";
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O << "\n";
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Mang = new Mangler(M, EmitCygwin);
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return false; // success
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}
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