diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp
index 06ad50762f7..fa6e33b075e 100644
--- a/lib/Target/CellSPU/SPUInstrInfo.cpp
+++ b/lib/Target/CellSPU/SPUInstrInfo.cpp
@@ -678,7 +678,7 @@ SPUInstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
 
   unsigned Opc = unsigned(Cond[0].getImm());
   // Pretty dull mapping between the two conditions that SPU can generate:
-  for (int i = sizeof(revconds)/sizeof(revconds[0]); i >= 0; --i) {
+  for (int i = sizeof(revconds)/sizeof(revconds[0]) - 1; i >= 0; --i) {
     if (revconds[i].Opc == Opc) {
       Cond[0].setImm(revconds[i].RevCondOpc);
       return false;
diff --git a/test/CodeGen/CellSPU/shift_ops.ll b/test/CodeGen/CellSPU/shift_ops.ll
index 928e4904b40..5b60dc178fa 100644
--- a/test/CodeGen/CellSPU/shift_ops.ll
+++ b/test/CodeGen/CellSPU/shift_ops.ll
@@ -16,8 +16,6 @@
 ; RUN: grep -w rotqbybi  %t1.s | count 1
 ; RUN: grep -w sfi       %t1.s | count 3
 
-; XFAIL: alpha|linux|sparc|ia64|arm
-
 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
 target triple = "spu"