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Debug Info: Implement DwarfUnit::addRegisterOffset using DwarfExpression.
No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225707 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -42,6 +42,9 @@ public:
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void EmitOp(uint8_t Op, const char* Comment) override;
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void EmitSigned(int Value) override;
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void EmitUnsigned(unsigned Value) override;
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unsigned getFrameRegister() override {
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llvm_unreachable("not available");
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};
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};
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void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
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@ -65,6 +65,22 @@ void DwarfExpression::AddShr(unsigned ShiftBy) {
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EmitOp(dwarf::DW_OP_shr);
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}
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bool DwarfExpression::AddMachineRegIndirect(unsigned MachineReg, int Offset) {
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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int DwarfReg = TRI->getDwarfRegNum(MachineReg, false);
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if (DwarfReg < 0)
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return false;
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if (MachineReg == getFrameRegister()) {
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// If variable offset is based in frame register then use fbreg.
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EmitOp(dwarf::DW_OP_fbreg);
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EmitSigned(Offset);
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} else {
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AddRegIndirect(DwarfReg, Offset);
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}
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return true;
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}
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void DwarfExpression::AddMachineRegPiece(unsigned MachineReg,
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unsigned PieceSizeInBits,
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unsigned PieceOffsetInBits) {
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@ -24,6 +24,7 @@ class TargetMachine;
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/// independently of whether they are emitted into a DIE or into a .debug_loc
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/// entry.
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class DwarfExpression {
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protected:
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TargetMachine &TM;
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public:
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DwarfExpression(TargetMachine &TM) : TM(TM) {}
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@ -31,6 +32,9 @@ public:
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virtual void EmitOp(uint8_t Op, const char* Comment = nullptr) = 0;
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virtual void EmitSigned(int Value) = 0;
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virtual void EmitUnsigned(unsigned Value) = 0;
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virtual unsigned getFrameRegister() = 0;
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/// Emit a dwarf register operation.
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void AddReg(int DwarfReg, const char* Comment = nullptr);
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/// Emit an (double-)indirect dwarf register operation.
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@ -43,6 +47,10 @@ public:
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/// Emit a shift-right dwarf expression.
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void AddShr(unsigned ShiftBy);
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/// Emit an indirect dwarf register operation for the given machine register.
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/// Returns false if no DWARF register exists for MachineReg.
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bool AddMachineRegIndirect(unsigned MachineReg, int Offset);
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/// \brief Emit a partial DWARF register operation.
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/// \param MLoc the register
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/// \param PieceSize size and
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@ -16,6 +16,7 @@
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#include "DwarfAccelTable.h"
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#include "DwarfCompileUnit.h"
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#include "DwarfDebug.h"
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#include "DwarfExpression.h"
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#include "llvm/ADT/APFloat.h"
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#include "llvm/IR/Constants.h"
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#include "llvm/IR/DIBuilder.h"
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@ -43,6 +44,35 @@ GenerateDwarfTypeUnits("generate-type-units", cl::Hidden,
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cl::desc("Generate DWARF4 type units."),
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cl::init(false));
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/// DwarfExpression implementation for DwarfUnit.
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class DIEDwarfExpression : public DwarfExpression {
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DwarfUnit &DU;
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DIELoc &DIE;
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public:
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DIEDwarfExpression(TargetMachine &TM, DwarfUnit &DU, DIELoc &DIE)
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: DwarfExpression(TM), DU(DU), DIE(DIE) {}
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void EmitOp(uint8_t Op, const char* Comment = nullptr) override;
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void EmitSigned(int Value) override;
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void EmitUnsigned(unsigned Value) override;
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unsigned getFrameRegister() override;
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};
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void DIEDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
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DU.addUInt(DIE, dwarf::DW_FORM_data1, Op);
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}
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void DIEDwarfExpression::EmitSigned(int Value) {
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DU.addSInt(DIE, dwarf::DW_FORM_sdata, Value);
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}
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void DIEDwarfExpression::EmitUnsigned(unsigned Value) {
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DU.addUInt(DIE, dwarf::DW_FORM_udata, Value);
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}
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unsigned DIEDwarfExpression::getFrameRegister() {
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const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
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return TRI->getFrameRegister(*DU.getAsmPrinter()->MF);
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}
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/// Unit - Unit constructor.
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DwarfUnit::DwarfUnit(unsigned UID, dwarf::Tag UnitTag, DICompileUnit Node,
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AsmPrinter *A, DwarfDebug *DW, DwarfFile *DWU)
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@ -463,22 +493,8 @@ bool DwarfUnit::addRegisterOpPiece(DIELoc &TheDie, unsigned Reg,
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/// addRegisterOffset - Add register offset.
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bool DwarfUnit::addRegisterOffset(DIELoc &TheDie, unsigned Reg,
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int64_t Offset) {
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const TargetRegisterInfo *TRI = Asm->TM.getSubtargetImpl()->getRegisterInfo();
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int DWReg = TRI->getDwarfRegNum(Reg, false);
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if (DWReg < 0)
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return false;
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if (Reg == TRI->getFrameRegister(*Asm->MF))
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// If variable offset is based in frame register then use fbreg.
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addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_fbreg);
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else if (DWReg < 32)
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addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_breg0 + DWReg);
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else {
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addUInt(TheDie, dwarf::DW_FORM_data1, dwarf::DW_OP_bregx);
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addUInt(TheDie, dwarf::DW_FORM_udata, DWReg);
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}
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addSInt(TheDie, dwarf::DW_FORM_sdata, Offset);
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return true;
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DIEDwarfExpression Expr(Asm->TM, *this, TheDie);
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return Expr.AddMachineRegIndirect(Reg, Offset);
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}
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/* Byref variables, in Blocks, are declared by the programmer as "SomeType
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@ -138,6 +138,7 @@ public:
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}
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// Accessors.
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AsmPrinter* getAsmPrinter() const { return Asm; }
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unsigned getUniqueID() const { return UniqueID; }
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uint16_t getLanguage() const { return CUNode.getLanguage(); }
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DICompileUnit getCUNode() const { return CUNode; }
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