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Improve lowering of sext to i128 on SPU.
The old algorithm inserted a 'rotqmbyi' instruction which was both redundant and wrong - it made shufb select bytes from the wrong end of the input quad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116701 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2642,11 +2642,16 @@ static SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG)
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DAG.getNode(SPUISD::PREFSLOT2VEC, dl, mvt, Op0, Op0),
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DAG.getConstant(31, MVT::i32));
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// reinterpret as a i128 (SHUFB requires it). This gets lowered away.
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SDValue extended = SDValue(DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
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dl, Op0VT, Op0,
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DAG.getTargetConstant(
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SPU::GPRCRegClass.getID(),
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MVT::i32)), 0);
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// Shuffle bytes - Copy the sign bits into the upper 64 bits
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// and the input value into the lower 64 bits.
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SDValue extShuffle = DAG.getNode(SPUISD::SHUFB, dl, mvt,
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DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i128, Op0), sraVal, shufMask);
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extended, sraVal, shufMask);
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return DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i128, extShuffle);
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}
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@ -12,6 +12,7 @@ entry:
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; CHECK: long 269488144
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; CHECK: long 66051
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; CHECK: long 67438087
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; CHECK-NOT: rotqmbyi
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; CHECK: rotmai
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; CHECK: lqa
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; CHECK: shufb
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@ -25,6 +26,7 @@ entry:
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; CHECK: long 269488144
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; CHECK: long 269488144
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; CHECK: long 66051
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; CHECK-NOT: rotqmbyi
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; CHECK: rotmai
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; CHECK: lqa
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; CHECK: shufb
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@ -39,6 +41,7 @@ entry:
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; CHECK: long 269488144
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; CHECK: long 269488144
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; CHECK: long 66051
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; CHECK-NOT: rotqmbyi
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; CHECK: rotmai
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; CHECK: lqa
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; CHECK: shufb
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