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Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR

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instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55582 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling 2008-08-31 02:59:23 +00:00
parent 3156b62855
commit 9440e35b98
2 changed files with 7 additions and 8 deletions
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10
lib/Target/CellSPU/SPUISelLowering.cpp
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@ -202,9 +202,13 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
// SPU can do rotate right and left, so legalize it... but customize for i8 // SPU can do rotate right and left, so legalize it... but customize for i8
// because instructions don't exist. // because instructions don't exist.
setOperationAction(ISD::ROTR, MVT::i32, Legal);
setOperationAction(ISD::ROTR, MVT::i16, Legal); // FIXME: Change from "expand" to appropriate type once ROTR is supported in
setOperationAction(ISD::ROTR, MVT::i8, Custom); // .td files.
setOperationAction(ISD::ROTR, MVT::i32, Expand /*Legal*/);
setOperationAction(ISD::ROTR, MVT::i16, Expand /*Legal*/);
setOperationAction(ISD::ROTR, MVT::i8, Expand /*Custom*/);
setOperationAction(ISD::ROTL, MVT::i32, Legal); setOperationAction(ISD::ROTL, MVT::i32, Legal);
setOperationAction(ISD::ROTL, MVT::i16, Legal); setOperationAction(ISD::ROTL, MVT::i16, Legal);
setOperationAction(ISD::ROTL, MVT::i8, Custom); setOperationAction(ISD::ROTL, MVT::i8, Custom);

5
test/CodeGen/CellSPU/rotate_ops.ll
View File

@ -8,11 +8,6 @@
; RUN grep rothi.*,.3 %t1.s | count 1 ; RUN grep rothi.*,.3 %t1.s | count 1
; RUN: grep andhi %t1.s | count 4 ; RUN: grep andhi %t1.s | count 4
; RUN: grep shlhi %t1.s | count 4 ; RUN: grep shlhi %t1.s | count 4
; XFAIL: *
;; FIXME: ROTR hasn't been implemented in CellSPU! It's marked as a "legal"
;; operation, but if used, the code generator complains that it can't
;; be selected.
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu" target triple = "spu"