6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-30 04:56:49 +00:00
Code Issues Projects Releases Wiki Activity

Remove unnecessary caching of the TargetMachine on NVPTXFrameLowering.

Browse Source 
Adjust the constructor accordingly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211846 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2014-06-27 02:05:22 +00:00
parent 04c4efc593
commit 9456c7b20a
3 changed files with 17 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
lib/Target/NVPTX/NVPTXFrameLowering.cpp
View File

@ -43,17 +43,21 @@ void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const {
// cvta.local %SP, %SPL;
if (is64bit) {
unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int64RegsRegClass);
MachineInstr *MI = BuildMI(
MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes_64),
NVPTX::VRFrame).addReg(LocalReg);
BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64),
MachineInstr *MI =
BuildMI(MBB, MBBI, dl,
MF.getTarget().getInstrInfo()->get(NVPTX::cvta_local_yes_64),
NVPTX::VRFrame).addReg(LocalReg);
BuildMI(MBB, MI, dl,
MF.getTarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR_64),
LocalReg).addImm(MF.getFunctionNumber());
} else {
unsigned LocalReg = MRI.createVirtualRegister(&NVPTX::Int32RegsRegClass);
MachineInstr *MI = BuildMI(
MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes),
NVPTX::VRFrame).addReg(LocalReg);
BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR),
MachineInstr *MI =
BuildMI(MBB, MBBI, dl,
MF.getTarget().getInstrInfo()->get(NVPTX::cvta_local_yes),
NVPTX::VRFrame).addReg(LocalReg);
BuildMI(MBB, MI, dl,
MF.getTarget().getInstrInfo()->get(NVPTX::MOV_DEPOT_ADDR),
LocalReg).addImm(MF.getFunctionNumber());
}
}

9
lib/Target/NVPTX/NVPTXFrameLowering.h
View File

@ -14,19 +14,18 @@
#ifndef NVPTX_FRAMELOWERING_H
#define NVPTX_FRAMELOWERING_H
#include "NVPTXSubtarget.h"
#include "llvm/Target/TargetFrameLowering.h"
namespace llvm {
class NVPTXTargetMachine;
class NVPTXFrameLowering : public TargetFrameLowering {
NVPTXTargetMachine &tm;
bool is64bit;
public:
explicit NVPTXFrameLowering(NVPTXTargetMachine &_tm, bool _is64bit)
: TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0), tm(_tm),
is64bit(_is64bit) {}
explicit NVPTXFrameLowering(NVPTXSubtarget &STI)
: TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0),
is64bit(STI.is64Bit()) {}
bool hasFP(const MachineFunction &MF) const override;
void emitPrologue(MachineFunction &MF) const override;

2
lib/Target/NVPTX/NVPTXTargetMachine.cpp
View File

@ -85,7 +85,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, StringRef TT,
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, is64bit), DL(computeDataLayout(Subtarget)),
InstrInfo(Subtarget), TLInfo(*this), TSInfo(&DL),
FrameLowering(*this, is64bit) {
FrameLowering(Subtarget) {
initAsmInfo();
}