From 94ae9d3d2dff562b63b248b56411723bd1949616 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Mon, 15 May 2006 18:35:02 +0000
Subject: [PATCH] Improve comment, patch provided by Vladimir Prus!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28307 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Target.td | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 78cf8dcaa09..57046b826ee 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -72,7 +72,9 @@ class RegisterClass<string namespace, list<ValueType> regTypes, int alignment,
 
   // RegType - Specify the list ValueType of the registers in this register
   // class.  Note that all registers in a register class must have the same
-  // ValueTypes.
+  // ValueTypes.  This is a list because some targets permit storing different 
+  // types in same register, for example vector values with 128-bit total size,
+  // but different count/size of items, like SSE on x86.
   //
   list<ValueType> RegTypes = regTypes;