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implement sextinreg i8->i64 and i16->i64

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32293 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-12-06 21:46:13 +00:00
parent 9f5776bb4d
commit 94c96cc519
1 changed files with 8 additions and 0 deletions
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8
lib/Target/PowerPC/PPCInstr64Bit.td
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@ -224,6 +224,14 @@ def SRD : XForm_6<31, 539, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB),
def SRAD : XForm_6<31, 794, (ops G8RC:$rA, G8RC:$rS, GPRC:$rB),
"srad $rA, $rS, $rB", IntRotateD,
[(set G8RC:$rA, (sra G8RC:$rS, GPRC:$rB))]>, isPPC64;
def EXTSB8 : XForm_11<31, 954, (ops G8RC:$rA, G8RC:$rS),
"extsb $rA, $rS", IntGeneral,
[(set G8RC:$rA, (sext_inreg G8RC:$rS, i8))]>;
def EXTSH8 : XForm_11<31, 922, (ops G8RC:$rA, G8RC:$rS),
"extsh $rA, $rS", IntGeneral,
[(set G8RC:$rA, (sext_inreg G8RC:$rS, i16))]>;
def EXTSW : XForm_11<31, 986, (ops G8RC:$rA, G8RC:$rS),
"extsw $rA, $rS", IntGeneral,
[(set G8RC:$rA, (sext_inreg G8RC:$rS, i32))]>, isPPC64;