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Fix a bug in MipsTargetLowering::LowerLOAD. A shift-right-logical node is

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inserted after the shift-left-logical node.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157937 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Akira Hatanaka 2012-06-04 17:46:29 +00:00
parent fd42ed676e
commit 94ccee2222
1 changed files with 2 additions and 1 deletions
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3
lib/Target/Mips/MipsISelLowering.cpp
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@ -2144,7 +2144,8 @@ SDValue MipsTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
DebugLoc DL = LD->getDebugLoc();
SDValue Const32 = DAG.getConstant(32, MVT::i32);
SDValue SLL = DAG.getNode(ISD::SHL, DL, MVT::i64, LWR, Const32);
SDValue Ops[] = { SLL, LWR.getValue(1) };
SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32);
SDValue Ops[] = { SRL, LWR.getValue(1) };
return DAG.getMergeValues(Ops, 2, DL);
}